SPRUJ52C june 2022 – july 2023 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
There are total sixteen PLLs in the device in MAIN domain:
Overview of the device PLLs with their reference clock options in MAIN domain is shown on Figure 5-16 and Figure 5-17. For more specific information about PLLs see Section 5.4.8.5, PLLs Device-Specific Information.
The external muxes of choosing the reference clocks are glitch-free muxes.