Product details

Number of channels (#) 1 Power switch MOSFET, IGBT, GaNFET Peak output current (A) 4 Input VCC (Min) (V) 4.5 Input VCC (Max) (V) 18 Features Hysteretic Logic Operating temperature range (C) -40 to 125 Rise time (ns) 9 Fall time (ns) 7 Prop delay (ns) 13 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) -5 Rating Catalog Undervoltage lockout (Typ) 4 Driver configuration Inverting, Non-Inverting
Number of channels (#) 1 Power switch MOSFET, IGBT, GaNFET Peak output current (A) 4 Input VCC (Min) (V) 4.5 Input VCC (Max) (V) 18 Features Hysteretic Logic Operating temperature range (C) -40 to 125 Rise time (ns) 9 Fall time (ns) 7 Prop delay (ns) 13 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) -5 Rating Catalog Undervoltage lockout (Typ) 4 Driver configuration Inverting, Non-Inverting
SOT-23 (DBV) 5 5 mm² 2.9 x 1.6
  • Low-Cost Gate-Driver Device Offering Superior
    Replacement of NPN and PNP Discrete Solutions
  • 4-A Peak-Source and Sink Symmetrical Drive
  • Ability to Handle Negative Voltages (–5 V) at
    Inputs
  • Fast Propagation Delays (13-ns typical)
  • Fast Rise and Fall Times (9-ns and 7-ns typical)
  • 4.5 to 18-V Single-Supply Range
  • Outputs Held Low During VDD UVLO (ensures
    glitch-free operation at power up and power down)
  • TTL and CMOS Compatible Input-Logic Threshold
    (independent of supply voltage)
  • Hysteretic-Logic Thresholds for High-Noise
    Immunity
  • Dual Input Design (choice of an inverting (IN- pin)
    or non-inverting (IN+ pin) driver configuration)
    • Unused Input Pin can be Used for Enable or
      Disable Function
  • Output Held Low when Input Pins are Floating
  • Input Pin Absolute Maximum Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • Operating Temperature Range of –40°C to
    +140°C
  • 5-Pin DBV (SOT-23) Package Option
  • Low-Cost Gate-Driver Device Offering Superior
    Replacement of NPN and PNP Discrete Solutions
  • 4-A Peak-Source and Sink Symmetrical Drive
  • Ability to Handle Negative Voltages (–5 V) at
    Inputs
  • Fast Propagation Delays (13-ns typical)
  • Fast Rise and Fall Times (9-ns and 7-ns typical)
  • 4.5 to 18-V Single-Supply Range
  • Outputs Held Low During VDD UVLO (ensures
    glitch-free operation at power up and power down)
  • TTL and CMOS Compatible Input-Logic Threshold
    (independent of supply voltage)
  • Hysteretic-Logic Thresholds for High-Noise
    Immunity
  • Dual Input Design (choice of an inverting (IN- pin)
    or non-inverting (IN+ pin) driver configuration)
    • Unused Input Pin can be Used for Enable or
      Disable Function
  • Output Held Low when Input Pins are Floating
  • Input Pin Absolute Maximum Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • Operating Temperature Range of –40°C to
    +140°C
  • 5-Pin DBV (SOT-23) Package Option

The UCC27517A single-channel, high-speed, low-side gate driver device is capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, the UCC27517A is capable of sourcing and sinking high peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay typically 13 ns.

The UCC27517A device is capable of handling –5 V at input.

The UCC27517A provides 4-A source and 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.

The UCC27517A is designed to operate over a wide VDD range of 4.5 V to 18 V and wide temperature range of –40°C to 140°C. Internal Undervoltage Lockout (UVLO) circuitry on VDD pin holds output low outside VDD operating range. The capability to operate at low voltage levels such as below 5 V, along with best-in-class switching characteristics, is especially suited for driving emerging wide band-gap power-switching devices such as GaN power semiconductor devices.

UCC27517A features a dual input design which offers flexibility of implementing both inverting (IN– pin) and non-inverting (IN+ pin) configurations with the same device. Either the IN+ or IN– pin can be used to control the state of the driver output. The unused input pin can be used for enable and disable function. For protection purpose, internal pullup and pulldown resistors on the input pins ensure that outputs are held low when input pins are in floating condition. Hence the unused input pin is not left floating and must be properly biased to ensure that driver output is in enabled for normal operation.

The input pin threshold of the UCC27517A device is based on TTL and CMOS compatible low-voltage logic which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

The UCC27517A single-channel, high-speed, low-side gate driver device is capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, the UCC27517A is capable of sourcing and sinking high peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay typically 13 ns.

The UCC27517A device is capable of handling –5 V at input.

The UCC27517A provides 4-A source and 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.

The UCC27517A is designed to operate over a wide VDD range of 4.5 V to 18 V and wide temperature range of –40°C to 140°C. Internal Undervoltage Lockout (UVLO) circuitry on VDD pin holds output low outside VDD operating range. The capability to operate at low voltage levels such as below 5 V, along with best-in-class switching characteristics, is especially suited for driving emerging wide band-gap power-switching devices such as GaN power semiconductor devices.

UCC27517A features a dual input design which offers flexibility of implementing both inverting (IN– pin) and non-inverting (IN+ pin) configurations with the same device. Either the IN+ or IN– pin can be used to control the state of the driver output. The unused input pin can be used for enable and disable function. For protection purpose, internal pullup and pulldown resistors on the input pins ensure that outputs are held low when input pins are in floating condition. Hence the unused input pin is not left floating and must be properly biased to ensure that driver output is in enabled for normal operation.

The input pin threshold of the UCC27517A device is based on TTL and CMOS compatible low-voltage logic which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

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Design & development

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Simulation model

UCC27517 PSpice Transient Model (Rev. B)

SLUM286B.ZIP (51 KB) - PSpice Model
Simulation model

UCC27517 TINA-TI Transient Reference Design

SLUM317.TSC (67 KB) - TINA-TI Reference Design
Simulation model

UCC27517 TINA-TI Transient Spice Model

SLUM318.ZIP (8 KB) - TINA-TI Spice Model
Simulation model

UCC27517 Unencrypted PSpice Transient Model

SLUM491.ZIP (2 KB) - PSpice Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Package Pins Download
SOT-23 (DBV) 5 View options

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