Product details


Datarate (Mbps) 10/100/1000 Interface type MII, RGMII Number of ports Single Rating Space Features Space Qualified, QMLV-RHA compliant Supply voltage (V) 1.1, 1.8, 2.5 IO supply (Typ) (V) 1.8, 2.5, 3.3 Operating temperature range (C) 25 to 25 Cable length (m) 120 open-in-new Find other Ethernet PHYs

Package | Pins | Size

CFP (HSL) (HBE) 64 119 mm² 10.9 x 10.9 open-in-new Find other Ethernet PHYs


  • QML Class V (QMLV), RHA, SMD 5962-20216 (Pending)
  • Military temperature range: –55°C to 125°C
  • Radiation performance
    • RHA up to TID = 100 krad(Si)
    • SEL Immune to LET = 85 MeV·cm2/mg
    • SEE Characterized to LET = 85 MeV·cm2/mg
  • Single Event Functional Interrupt (SEFI) Monitor Suite
    • Monitor
      • IEEE PCS state machine monitors
      • ECC configuration register monitor
      • PLL lock monitor
      • On-chip temperature monitor
    • Action
      • Interrupt pins to monitor events
    • Correction
      • ECC-protected configuration registers
      • Pin-configurable automatic SEFI recovery
      • Serial Management Interface (SMI) disable
  • Fully compatible to IEEE802.3 1000BASE-T, 100BASE-TX and 10BASE-Te specifications
  • Low RGMII latency (Tx < 90 ns, Rx < 290 ns)
  • Time Sensitive Network Compliant
  • MAC interface: RGMII, MII
  • Integrated MDI termination resistors
  • Programmable RGMII termination impedance
  • Power supply: 2.5 V, 1.8 V, 1.1 V
  • Configurable I/O voltages: 1.8 V, 2.5 V, and 3.3 V
  • 25-MHz or 125-MHz synchronized clock output
  • Cable diagnostics: Open, Short using TDR
  • Fast Link Drop Modes < 10 µs
  • Exceeds 8000 V IEC 61000-4-2 ESD Protection
  • JTAG Support
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The DP83561-SP is a high reliability gigabit ethernet PHY designed for the high-radiation environment of space. The DP83561-SP is a low power, fully featured physical layer transceiver with integrated PMD sub-layers to support 10BASE-Te, 100BASE-TX and 1000BASE-T Ethernet protocols.

The DP83561-SP is designed for easy implementation of 10/100/1000 Mbps Ethernet LANs in extremely hostile environments. It interfaces directly to twisted pair media through an external transformer. This device interfaces directly to the MAC layer through Reduced GMII (RGMII) and MII.

The device is Radiation Hardened by Design (RHBD), fabricated by Texas Instruments using a CMOS process, and is available in 64-pin Ceramic Quad Flat Pack (CQFP) package, with a 11-mm × 11-mm body size (nominal).

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Technical documentation

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Type Title Date
* Data sheet DP83561-SP Radiation-Hardness-Assured (RHA), 10/100/1000 Ethernet PHY Transceiver with SEFI Handling Sub-System datasheet (Rev. A) Jun. 04, 2021
User guide DP83561EVM User Guide Apr. 19, 2021
Selection guide TI Space Products (Rev. H) Jan. 27, 2021
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations May 18, 2020
Application note Single-Event Effects Confidence Interval Calculations Jan. 14, 2020
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing Jun. 17, 2019

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide
The DP83561-EVM is an evaluation board designed to demonstrate the performance and unique features of the DP83561-SP Space-grade ethernet physical layer transceiver.
  • SEFI monitoring
  • RGMII and MII interfaces
  • On-board MSP430F5529 with USB-2-MDIO for register access
  • Ethernet compliance testing support
  • BER testing via back-to-back configuration or loopback modes

Design tools & simulation

SNLM248.ZIP (727 KB) - IBIS Model
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

CAD/CAE symbols

Package Pins Download
CFP (HBE) 64 View options

Ordering & quality

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  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Support & training

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