Product details


Datarate (Mbps) 10/100 Interface type MII, RMII Number of ports Single Rating Catalog Features IEEE 1588 PTP, FX support, Cable diagnostics, JTAG1149.1 Supply voltage (V) 3.3 IO supply (Typ) (V) 2.5, 3.3 Operating temperature range (C) -40 to 85 Cable length (m) 150 open-in-new Find other Ethernet PHYs

Package | Pins | Size

WQFN (RHS) 48 49 mm² 7 x 7 open-in-new Find other Ethernet PHYs


  • IEEE 1588 V1 and V2 Supported
  • UDP/IPv4, UDP/IPv6, and Layer2 Ethernet Packets Supported
  • IEEE 1588 Clock Synchronization
  • Selectable Frequency Synchronized Low Jitter Clock Output
  • Timestamp Resolution of 8 ns
  • Allows Sub 10 ns Synchronization to Master Reference
  • 12 IEEE 1588 GPIOs for Trigger or Capture
  • Deterministic, Low Transmit and Receive Latency
  • Dynamic Link Quality Monitoring
  • TDR Based Cable Diagnostic and Cable Length Detection
  • 10/100 Mb/s Packet BIST (Built in Self Test)
  • Error-Free Operation up to 150 Meters CAT5 Cable
  • ESD Protection - 8 kV Human Body Model
  • 2.5 V and 3.3 V I/Os and MAC Interface
  • Auto-MDIX for 10/100 Mbps
  • Auto-Crossover in Forced Modes of Operation
  • RMII Rev. 1.2 and MII MAC Interface
  • RMII Master Mode
  • 25 MHz MDC and MDIO Serial Management Interface
  • IEEE 802.3u 100BASE-FX Fiber Interface
  • IEEE 1149.1 JTAG
  • Programmable LED Support for Link, 10 /100 Mb/s Mode, Duplex, Activity, and Collision Detect
  • Optional 100BASE-TX Fast Link-Loss Detection
  • Industrial Temperature Range
  • 48 Pin WQFN Package (7mm) x (7mm)

PHYTER is a trademark of Texas Instruments. All trademarks are the property of their respective owners.

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The DP83630 Precision PHYTER device delivers the highest level of precision clock synchronization for real time industrial connectivity based on the IEEE 1588 standard. The DP83630 has deterministic, low latency and allows choice of microcontroller with no hardware customization required. The integrated 1588 functionality allows system designers the flexibility and precision of a close to the wire timestamp. The three key 1588 features supported by the device are:

— Packet time stamps for clock synchronization

— Integrated IEEE 1588 synchronized low jitter clock generation

— Synchronized event triggering and time stamping through GPIO

DP83630 offers innovative diagnostic features unique to Texas Instruments, including dynamic monitoring of link quality during standard operation for fault prediction. These advanced features allow the system designer to implement a fault prediction mechanism to detect and warn of deteriorating and changing link conditions. This single port fast Ethernet transceiver can support both copper and fiber media.

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Technical documentation

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Type Title Date
* Data sheet DP83630 Precision PHYTER - IEEE® 1588 Precision Time Protocol Transceiver datasheet (Rev. B) Apr. 15, 2013
Technical article SimpliPHY your Ethernet design, part 1: Ethernet PHY basics and selection process Mar. 11, 2020
Technical article Overcoming Ethernet connectivity challenges on the power grid Jun. 27, 2019
Application note Selection and specification of crystals for Texas Instruments ethernet physical Feb. 06, 2019
Technical article How to implement IEEE 1588 time stamping in an Ethernet transceiver Sep. 28, 2016
Technical article Herculean performance in a low-cost development kit: TI’s newest LaunchPad Jun. 11, 2015
Application note AN-1469 PHYTER® Design & Layout Guide (Rev. D) Apr. 26, 2013
Application note AN-1540 Power Measurement of Ethernet Physical Layer Products (Rev. B) Apr. 26, 2013
Application note AN-1548 PHYTER 100 Base-TX Reference Clock Jitter Tolerance (Rev. B) Apr. 26, 2013
Application note AN-1729 DP83640 IEEE 1588 PTP Synchronized Clock Output (Rev. D) Apr. 26, 2013
Application note AN-1794 Using RMII Master Mode (Rev. A) Apr. 26, 2013
Application note AN-2006 Synchronizing a DP83640 PTP Master to a GPS Receiver (Rev. A) Apr. 26, 2013
Application note DP83640 Synchronous Ethernet Mode: Achieving Sub-ns Accuracy in PTP Applications (Rev. A) Apr. 26, 2013
Application note IEEE 1588 Boundary Clock and Transparent Clock Implementation Using the DP83640 (Rev. A) Apr. 26, 2013
Application note IEEE 1588 Precision Time Protocol Time Synchronization Performance (Rev. A) Apr. 26, 2013
Application note IEEE 1588 Synchronization Over Standard Networks Using the DP83640 (Rev. A) Apr. 26, 2013
Application note Improving Electro-Magnetic Noise Immunity in Serial Communications Systems (Rev. A) Apr. 26, 2013
Application note Reducing Radiated Emissions in Ethernet 10/100 LAN Applications (Rev. A) Apr. 26, 2013
More literature EMC Test Report Jan. 04, 2013
User guide DP83630 Ethernet Physical Layer Transceiver Demo Board User Guide Jan. 25, 2012

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide
DP83640 Basic product evaluation and customer demo board.
  • IEEE 1588 PTP clock output
  • ALP compatible USB interface Fiber support (stuff option)
document-generic User guide

The Hercules™ TMS570LC43x LaunchPad™ Development Kit is a low-cost evaluation platform based on the highest performance Hercules MCU TMS570LC4357 – lockstep cached 300MHz ARM® Cortex®-R5F based TMS570 series automotive-grade MCU designed to aid in the development of ISO 26262 and IEC 61508 (...)

  • USB powered and capability for external 5v supply
  • On board USB XDS_ICDIc2 JTAG debug
  • IEEE 1588 precision time Ethernet PHY DP83630
  • On board SCI to PC serial communication
  • User programmable push buttons
  • Reset switches
  • LEDs and Analog input
  • Two 40 pin BoosterPack XL Headers (one populated)
  • High density (...)

Software development

USB to MDIO serial management tool
USB-2-MDIO The USB-2-MDIO software tool lets Texas Instruments' Ethernet PHYs access the MDIO status and device control registers.  The USB-2-MDIO tool includes a LaunchPad™ Development kit for TI's MSP430™ MCUs that is interfaced with a lightweight (...)
  • MDIO bus controller
  • IEEE 802.3 clause 22
  • IEEE 802.3ah clause 22 access to clause 45 registers
Ethernet PHY Linux drivers & tools
ETHERNET-SW The Linux drivers for Texas Instruments' Ethernet physical layer (PHY) transceivers support communication through the serial management interface (MDC/MDIO) to configure and read PHY registers.

The USB-2-MDIO software lets you directly access the registers during debug and prototyping.  (...)

SNLC036.ZIP (4500 KB)
SNLC035.ZIP (0 KB)

Design tools & simulation

SNLM147A.ZIP (59 KB) - IBIS Model
SNLM177.ZIP (1 KB) - BSDL Model
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide
SNLR006.PDF (1079 KB)

Reference designs

High Availability High Speed Counter (HSC) and Pulse Train Output (PTO) Reference Design
TIDM-HAHSCPTO — This TI design provides a reference solution (firmware and test platform) for two different industrial IO functions related to motion control: High Speed Counter (HSC) and Pulse Train Output (PTO). The design is based on a microcontroller platform that is suitable for use in industrial applications (...)
document-generic Schematic document-generic User guide
10/100 Mbps Industrial Ethernet Brick with IEEE 1588 Precision Time Protocol (PTP) Transceiver
TIDA-00496 The TIDA-00496 TI Design is a compact brick for demonstrating capabilities of Precision PHYTERTM. As more systems in the power grid are using time information for real time analysis, timing becomes critical. This design achieves time synchronization with nanosecond accuracy using IEEE 1588v2 (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
WQFN (RHS) 48 View options

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Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

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