DLPLCRC410EVM

DLPLCRC410 Evaluation Module

DLPLCRC410EVM

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Overview

The DLPLCRC410EVM, paired with one of five other DMD-based EVMs, is an evaluation platform exhibiting advanced light control for applications like lithography, 3D Printing (SLS and SLA), Machine Vision, and Marking and Coding. This EVM enables evaluations of new customer illumination sources, optics, algorithm, and exposure processes to quicken potential evalation of DLP technology, customer learning cycles, and times to market.

Features
  • Light control of one of 5 different DMDs
  • Binary pattern rates up to 32 kHz
  • Grayscale patterns rates up to 1.9 kHz
  • 2xLVDS DDR input data interface at 400Mhz clock rate
  • Supports random row addressing of DMD rows

  • Power supply not included

Near-UV products (400 to 420 nm)
DLP7000 DLP® 0.7 XGA 2xLVDS Type-A DMD

 

Near-UV products (400 to 420 nm)
DLP9500 DLP® 0.95 1080p 2xLVDS Type-A DMD DLPA200 DMD Micromirror Driver DLPC410 Digital controller for DLP650LNIR, DLP7000/7000UV & DLP9500/DLP9500UV digital micromirror dev

 

Near-infrared products (> 700 nm)
DLP650LNIR DLP 0.65 NIR WXGA S450 DMD

 

Near-infrared products (> 700 nm)
DLPR410 PROM for DLP® Discovery 4100 chipset

 

UV products (< 400 nm)
DLP7000UV DLP® 0.7 XGA 2xLVDS UV Type-A DMD DLP9500UV DLP® 0.95 1080p 2xLVDS UV Type-A DMD

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Evaluation board

DLPLCRC410EVM — DLPC410 Controller evaluation board

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Support software

DLP Discovery 4100 Explorer GUI — DLPC104.ZIP (12182KB)

lock = Requires export approval (1 minute)
GUI for evaluation module (EVM)

DLP Discovery 4100 Explorer GUI (Rev. A) — DLPC104A.ZIP (12206KB)

lock = Requires export approval (1 minute)
GUI for evaluation module (EVM)

DLP Discovery 4100 Explorer GUI version 2.0 (Rev. A) — DLPC133A.ZIP (20644KB)

lock = Requires export approval (1 minute)
Support software

DLP(R) Discovery 4100 Applications FPGA Pattern Generator Source Code — DLPC103.ZIP (4340KB)

lock = Requires export approval (1 minute)
Application software & framework

DLP(R) Discovery 4100 Applications FPGA Pattern Generator Source Code (Rev. A) — DLPC103A.ZIP (4509KB)

lock = Requires export approval (1 minute)
GUI for evaluation module (EVM)

DLP(R) Discovery 4100 Applications FPGA Pattern Generator Source Code version 2. — DLPC134.ZIP (4509KB)

lock = Requires export approval (1 minute)
TI's Standard Terms and Conditions for Evaluation Items apply.

Design files

Technical documentation

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Type Title Date
* User guide DLP Discovery 4100 Development Kit Software User’s Guide (Rev. A) Nov. 28, 2018
Application note Wavelength Transmittance Considerations for DLP DMD Windows (Rev. E) Dec. 17, 2019
Application note System Design Considerations Using TI DLP® Technology in UVA (363 – 420 nm) (Rev. A) Oct. 02, 2019
White paper High-power NIR laser system benefits with TI’s DLP® technology Dec. 12, 2018
User guide Discovery 4100 APPSFPGA PGen Design (Rev. A) Dec. 04, 2018
User guide DLP Discovery 4100 Controller Board API Programmer’s Guide (Rev. A) Dec. 03, 2018
Application note DMD 101: Introduction to Digital Micromirror Device (DMD) Technology (Rev. B) Feb. 23, 2018
Application note System Design Considerations Using TI DLP Technology Down to 400 nm Nov. 12, 2014

Support & training

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