DLP7000UV

• 0.7-Inch Diagonal Micromirror Array
  • 1024 × 768 Array of Aluminum, Micrometer-Sized Mirrors
  • 13.68-µm Micromirror Pitch
  • ±12° Micromirror Tilt Angle (Relative to Flat State)
  • Designed for Corner Illumination
• Designed for Use With UV Light (363 to 420 nm):
  • Window Transmission 98% (Single Pass, Through Two Window Surfaces)
  • Micromirror Reflectivity 88%
  • Array Diffraction Efficiency 85%
  • Array Fill Factor 92% (Nominal)
• Two 16-Bit, Low-Voltage Differential Signaling (LVDS) Double Data Rate (DDR) Input Data Buses
• Up to 400 MHz Input Data Clock Rate
• 40.64-mm by 31.75-mm by 6.0-mm Package Footprint
• Hermetic Package

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DLP7000UV is a digitally controlled MEMS (micro-electromechanical system) spatial light modulator (SLM). When coupled to an appropriate optical system, the DLP7000UV can be used to modulate the amplitude, direction, and/or phase of incoming light.

The DLP7000UV digital micromirror device (DMD) is an addition to the DLP^® Discovery™ 4100 platform, which enables very fast pattern rates combined with high performance spatial light modulation operating beyond the visible spectrum into the UVA spectrum (363 nm to 420 nm). The DLP7000UV DMD is designed with a special window that is optimized for UV transmission. The DLP Discovery 4100 platform also provides the highest level of individual micromirror control with the option for random row addressing. Combined with a hermetic package, the unique capability and value offered by DLP7000UV makes it well suited to support a wide variety of industrial, medical, and advanced display applications.

The DLP7000UV DMD with a hermetic package is sold with a dedicated DLPC410 controller for high speed pattern rates of >32000 Hz (1-bit binary) and >1900 Hz (8-bit gray), one DLPR410 (DLP Discovery 4100 Configuration PROM), and one DLPA200 (DMD micromirror driver).

Reliable function and operation of the DLP7000UV requires that it be used in conjunction with the other components of the chipset. A dedicated chipset provides developers easier access to the DMD as well as high speed, independent micromirror control.

Electrically, the DLP7000UV consists of a two-dimensional array of 1-bit CMOS memory cells, organized in a grid of 1024 memory cell columns by 768 memory cell rows. The CMOS memory array is addressed on a row-by-row basis, over two 16-bit low voltage differential signaling (LVDS) double data rate (DDR) buses. Addressing is handled via a serial control bus. The specific CMOS memory access protocol is handled by the DLPC410 digital controller.