Product details

Chipset family DLPC410, DLP650LNIR, DLP7000, DLP9500, DLP7000UV, DLP9500UV, DLPR410, DLPA200, DLPLCRC410EVM Component type Controller Pattern rate, binary (Max) (Hz) 32552 Pattern rate, 8-bit (Max) (Hz) 4069 Thermal dissipation (°C/W) 3.2
Chipset family DLPC410, DLP650LNIR, DLP7000, DLP9500, DLP7000UV, DLP9500UV, DLPR410, DLPA200, DLPLCRC410EVM Component type Controller Pattern rate, binary (Max) (Hz) 32552 Pattern rate, 8-bit (Max) (Hz) 4069 Thermal dissipation (°C/W) 3.2
  • Operates the Following DLP® Chips:
    • DLP650LNIR, DLP7000, DLP7000UV, DLP9500, and DLP9500UV DMDs
    • DLPA200 DMD Micromirror Driver
    • DLPR410 Configuration PROM
  • Enables High Speed DMD Pattern Rates
    • 1-Bit Binary Pattern Rates up to 32 kHz
    • 8-Bit Monochrome Pattern Rates up to 4 kHz
  • 400 MHz Input Data Clock Rates
  • 64-Bit 2xLVDS Data Bus Interfaces In/Out
  • Supports Random Row and LOAD4 DMD Addressing
  • Compatible With a Variety of User Defined Processors or FPGAs
  • Operates the Following DLP® Chips:
    • DLP650LNIR, DLP7000, DLP7000UV, DLP9500, and DLP9500UV DMDs
    • DLPA200 DMD Micromirror Driver
    • DLPR410 Configuration PROM
  • Enables High Speed DMD Pattern Rates
    • 1-Bit Binary Pattern Rates up to 32 kHz
    • 8-Bit Monochrome Pattern Rates up to 4 kHz
  • 400 MHz Input Data Clock Rates
  • 64-Bit 2xLVDS Data Bus Interfaces In/Out
  • Supports Random Row and LOAD4 DMD Addressing
  • Compatible With a Variety of User Defined Processors or FPGAs

The DLPC410 is a digital controller that supports five DMD options: DLP650LNIR, DLP7000, DLP7000UV, DLP9500, and DLP9500UV. It is the convenient, high-speed data and control interface between the application electronics and the DMD. The DLPC410 provides DMD Mirror Clocking Pulses (Resets) and timing information to the DLPA200 DMD Micromirror Driver. The device is configured with firmware stored in the DLPR410 PROM.

This family of chipsets enables pixel data rates up to 48 Gigabits per second (Gbps) with the option for single, dual, quad, and global Resets. In addition, random row addressing and LOAD4 capabilities are offered. Often the family of chips is used when designing UV and NIR systems such as direct imaging lithography, 3D printing, and laser marking systems that need fast throughput and pixel accurate control.

In DLP-based electronics solutions, image data is 100% digital from the DLPC410 input port to the projected image. The image stays in digital form and is never converted into an analog signal. The DLPC410 processes the digital input image and converts the data into a format needed by the image on the DMD. The DMD then steers the light using binary pulse-width modulation (PWM) for each pixel mirror.

The DLPC410 is the DMD digital controller that controls the DLP650LNIR, DLP7000, DLP7000UV, DLP9500, and DLP9500UV DMDs (see Functional Block Diagram, Functional Block Diagram, and Functional Block Diagram). The DLPC410 provides developers easy access to the DMD as well as high speed, independent micromirror control. See the list of required chipset components for each DMD solution in Device Configurations table:

Reliable function and operation of the DLPC410 requires that it be used in conjunction with the other components of the chipset in DLPC410 Device Configurations table. For more information on the chipset components, see the data sheets in Related Documentation.

The DLPC410 is a digital controller that supports five DMD options: DLP650LNIR, DLP7000, DLP7000UV, DLP9500, and DLP9500UV. It is the convenient, high-speed data and control interface between the application electronics and the DMD. The DLPC410 provides DMD Mirror Clocking Pulses (Resets) and timing information to the DLPA200 DMD Micromirror Driver. The device is configured with firmware stored in the DLPR410 PROM.

This family of chipsets enables pixel data rates up to 48 Gigabits per second (Gbps) with the option for single, dual, quad, and global Resets. In addition, random row addressing and LOAD4 capabilities are offered. Often the family of chips is used when designing UV and NIR systems such as direct imaging lithography, 3D printing, and laser marking systems that need fast throughput and pixel accurate control.

In DLP-based electronics solutions, image data is 100% digital from the DLPC410 input port to the projected image. The image stays in digital form and is never converted into an analog signal. The DLPC410 processes the digital input image and converts the data into a format needed by the image on the DMD. The DMD then steers the light using binary pulse-width modulation (PWM) for each pixel mirror.

The DLPC410 is the DMD digital controller that controls the DLP650LNIR, DLP7000, DLP7000UV, DLP9500, and DLP9500UV DMDs (see Functional Block Diagram, Functional Block Diagram, and Functional Block Diagram). The DLPC410 provides developers easy access to the DMD as well as high speed, independent micromirror control. See the list of required chipset components for each DMD solution in Device Configurations table:

Reliable function and operation of the DLPC410 requires that it be used in conjunction with the other components of the chipset in DLPC410 Device Configurations table. For more information on the chipset components, see the data sheets in Related Documentation.

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Technical documentation

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

DLPLCR65NEVM — DLP650LNIR DMD evaluation module

This DLP evaluation module (EVM) houses DLP650LNIR, a 0.65 NIR WXGA Series 450 DMD intended for use in applications using 850-2000 nm near-infrared (NIR) illumination sources. DLPLCR65NEVM is an advanced imaging option for laser sintering, ablation, marking, coding, printing and other applications (...)
User guide: PDF
Not available on TI.com
Evaluation board

DLPLCR70EVM — DLP7000 DMD evaluation board

This DLP evaluation module (EVM) houses DLP7000, a 0.7 XGA 2xLVDS Type A DMD containing 1076 x 768 micromirrors with 13.6 µm pitch. When paired with DLPLCRC410EVM, users get pixel accurate control with 1-bit pattern rates up to 32,225 Hz. DLPLCR70EVM is right evaluation choice for designers (...)
User guide: PDF
Not available on TI.com
Evaluation board

DLPLCR95EVM — DLP9500 DMD evaluation board

This DLP evaluation module (EVM) houses DLP9500, a 0.95 1080p 2xLVDS Type-A DMD containing over two million micromirrors with 10.8 µm pitch. When paired with DLPLCRC410EVM, users get pixel accurate control with 1-bit pattern rates up to 23,148 Hz. DLPLCR95EVM is the right evaluation choice (...)
User guide: PDF
Not available on TI.com
Evaluation board

DLPLCRC410EVM — DLPLCRC410 Evaluation Module

The DLPLCRC410EVM, paired with one of five other DMD-based EVMs, is an evaluation platform exhibiting advanced light control for applications like lithography, 3D Printing (SLS and SLA), Machine Vision, and Marking and Coding. This EVM enables evaluations of new customer illumination sources, (...)
User guide: PDF
Not available on TI.com
Optical module

DLP-OMM-SEARCH — DLP® Products third-party search tools

To best meet your design needs and accelerate your time-to-market, DLP® Products works with a variety of third parties to help with everything from optical modules and hardware design to specialty software and other production services. Download one or both search tools listed below to quickly (...)

Optical module

OPTECKS-3P-SPARKNIR

Optecks Telecentric NIR optical engine

The SPARK NIR telecentric optical engine is designed for the 0.65” digital micro-mirror devices with 16:9 aspect ratio such as the DLP650LNIR. All optical components have a high-quality anti-reflection (AR) coating within 600 - 1050 nm spectrum. The SPARK optical engine has the capability of (...)

From: Optecks, LLC
Application software & framework

DLP(R) Discovery 4100 Applications FPGA Pattern Generator Source Code (Rev. A)

DLPC103A.ZIP (4509 KB)
lock = Requires export approval (1 minute)
GUI for evaluation module (EVM)

DLP Discovery 4100 Explorer GUI (Rev. A)

DLPC104A.ZIP (12206 KB)
lock = Requires export approval (1 minute)
GUI for evaluation module (EVM)

DLP(R) Discovery 4100 Applications FPGA Pattern Generator Source Code version 2.

DLPC134.ZIP (4509 KB)
lock = Requires export approval (1 minute)
Support software

DLP Discovery 4100 Explorer GUI

DLPC104.ZIP (12182 KB)
lock = Requires export approval (1 minute)
Simulation model

DLPC410 IBIS Model

DLPC065.ZIP (67 KB) - IBIS Model
CAD/CAE symbol

DLPC410 Board Design Files (Rev. A)

DLPR018A.ZIP (25042 KB)
Simulation tool

DLPR410-IBIS — DLPR410 IBIS Model

IBIS file for the DLPR410 PROM device which supports the DLPC410, DLP650LNIR, DLP7000, DLP7000UV, DLP9500 and DLP9500UV.
From: Xilinx
Package Pins Download
(DLP) 676 View options

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