SLUSDQ4 April 2019 BQ79606A-Q1
A set of window comparators provides cell voltage monitoring for all six channels that is separate from the main acquisition path and works in parallel with the main ADC route. This comparator function is entirely separate from the ADC function and as such, even if the ADC function fails, the analog comparators still flag the crossing of the (register selectable) under-voltage and over-voltage comparator thresholds. The thresholds, and deglitch timing are programmable and are the same for all cells. Each cell has independent on/off control. An internal DAC sets the over-voltage and under-voltage thresholds. The DAC uses a separate reference circuit REF2 from the ADC reference REF1. The OV threshold is programmable to OFF or from 2V to 5V in steps of 25 mV using the OV_THRESH register. The UV threshold is programmable to OFF or from 0.7 V to 3.875 V in steps of 25 mV using the UV_THRESH register.
Use the OVUV_CTRL[CELL*_EN] bits to enable the cells that are required for OV/UV monitoring. Use the CONTROL2[OVUV_EN] bit to enable the comparators. When enabled, all of the configuration bits are read. Further changes to the registers have no effect until the OVUV_EN bit is cleared and set again.
Once enabled, the cells are monitored in a "round-robin" fashion, starting with CELL1 and cycling through to CELL6. The total time taken to do the round-robin cycle is tCYCLE. The monitoring time for each CELL input is tRR_SLOT. The LOOP_STAT[OVUV_LOOP_DONE] bit is updated at the end of each round-robin cycle (including the BIST, if enabled. See CB_DONE, OVUV, and OTUT Built-In Self Test (BIST) for details). If already set, the bit remains as 1 until cleared by a read.
The deglitch time is programmed using the COMP_DG[OVUV_DG] bits. The deglitch is a count up/down style deglitch. During the monitoring cycle, the comparator checks the voltage. A counter is incremented when the comparator is tripped, and decremented when the comparator is not tripped. Once the counter reaches the programmed threshold, the OV_FAULT[CELL*] or UV_FAULT[CELL*] bit (depending on which comparator trips) is updated, and, if unmasked, the NFAULT output and/or the FAULT* interface signals the fault to the host. Note that due to the round-robin architecture, the total delay for an OV or UV event may be as high as (tCYCLE-tRR_SLOT)+ 0.7ms.
The OVUV function will not function if enabled during cell balancing as it uses the CB* inputs for sensing. Additionally, during the cell balancing cycle, with CBDONE enabled, the OVUV function is paused (if enabled). The UVOV comparators stop running during cell diagnostics.