220.127.116.11.12.1.1 Gain Error Correction
Gain Error Correction: For a 5V cell voltage, -19.4 mV to 19.4 mV in 255 steps (8 bits) in the CELL*_GAIN registers (one per channel) Procedure:
- Set the CELL ADC to 1MHz frequency, 256 Decimation Ration, Corner freqeuncy to 1.2 Hz for best results.
- Apply voltage VIN1, read back from ADC VOUT1 in the VCELL*_LF, VCELL*_HF registers, and record both.
- Apply voltage VIN2, read back from ADC VOUT2 in the VCELL*_LF, VCELL*_HF registers, and record both.
- Find the gain error correction (GEC) at 5 V (5V is used regardless of VINx value) and write the 8-bit value to the CELL*_GAIN register.
- Calculate slope m = (VOUT2–VOUT1) / (VIN2–VIN1)
- The gain error is calculated at 5V. Thus Gain Error=[(5V*m)-5V]
- The Gain Shift value is 19.4mV*2/255=0.15mV
- Then take the negative of the gain and divide it by the gain shift to find bit shift required Bit Shift=(-Gain Error)/(Gain Shift)
- Then convert bit shift to a two’s complement hex value
- Make sure that if the bit shift is greater than “127”, the hex value will be “7F”
- Make sure that if the bit shift is less than “-128”, the hex value will be “80”
- Finally enter the calculated Hex value to CELL*_Gain
- Repeat steps 1-3 on each cell voltage
- Perform the steps in Offset Error Correction.