SLUSDQ4 April 2019 BQ79606A-Q1
The UART interface follows the standard serial protocol of 8-N-1 (see Figure 22), where it sends information as a START bit, followed by eight data bits, and then one STOP bit. The STOP bit indicates the end of the byte. If a byte is received that does not have the STOP bit set, the COMM_UART_FAULT[STOP] bit is set, indicating there may be a baud rate issue between the host and the device. In all, 10 bits comprise a character time. Received data bits are over-sampled by 16 times to improve communication reliability.
The UART sends data on the TX pin and receives data on the RX pin. When idle, the TX and RX are high. The UART interface requires that RX are pulled-up to VIO through a 10KΩ to 100-KΩ resistor. Do not leave RX unconnected. Ensure RX is connected directly to VIO for stack devices. The TX must be pulled high on the host-side on base/bridge devices to prevent triggering an invalid communications frame when the communication cable is not attached, or during power-off or the shutdown state when TX is high impedance. TX is always pulled to VIO internally while in ACTIVE or SLEEP mode, whether enabled or disabled. Leave TX unconnected if not used in stack devices. When using a serial cable to connect to the host controller, connect the TX pullup on the host side and the RX pullup on the BQ79606A-Q1 side.
The UART interface is strictly a half-duplex interface. While transmitting, any attempted communication on RX is ignored. The only exceptions are COMM CLEAR and COMM RESET. Receiving one of these commands immediately terminates the communication and performs the required action. See Communication Clear (Break) Detection and Communication Reset Detection for more details.