JAJSKP5A December 2020 – September 2021 TAS2764
PRODUCTION DATA
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | VBAT1S_MODE | RW | 0h | VBAT1S supply 0b = Supplied externally 1b = Internal generated from PVDD |
6 | IRQZ_PU | RW | 0h | IRQZ internal pull up enable. 0b = Disabled 1b = Enabled |
5 | AMP_SS
*When Spread Spectrum and Sync Mode are both enabled, Sync Mode takes priority | RW | 1h | Low EMI spread spectrum is 0b = Disabled 1b = Enabled |
4-3 | SAR_FLT[1:0] | RW | 0h | VBAT1S and PVDD ADC filter frequency 00b = Disabled 01b = 300 KHz 10b = 150 KHz 11b = 50 KHz |
2-0 | HPF_FREQ_PB[2:0] | RW | 1h | Forward Path DC blocker -3dB corner frequency for 48/96 kHz sampling rates 0h = Disabled (filter bypassed) 1h = 2 Hz 2h = 50 Hz 3h = 100 Hz 4h = 200 Hz 5h = 400 Hz 6h = 800 Hz 7h = Reserved * For 44.1/88.2 kHz sampling rates divide the values from above by 1.0884 |