SLUUD63A December 2024 – October 2026 BQ41Z90
| Class | Subclass | Name | Type | Min | Max | Default | Unit |
|---|---|---|---|---|---|---|---|
| Settings | AFE | Short Circuit Discharge | H1 | 0x0 | 0x0F | 0x0F | Hex |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RSVD | RSVD | RSVD | RSVD | SC_SCD_SEL3 | SC_SCD_SEL2 | SC_SCD_SEL1 | SC_SCD_SEL0 |
| RSVD (Bit 7-4): Reserved. Do not use. | ||
| SC_SCD_SEL3 (Bit 3): bit 3 of SC_SCD_SEL register | ||
| SC_SCD_SEL2 (Bit 2): bit 2 of SC_SCD_SEL register | ||
| SC_SCD_SEL1 (Bit 1): bit 1 of SC_SCD_SEL register | ||
| SC_SCD_SEL0 (Bit 0): bit 0 of SC_SCD_SEL register | ||
| SC_SCD_SEL (Bits 3-0): Voltage threshold for short circuit in discharge. ASCD Voltage Threshold is defined in Analog Short Circuit in Discharge Protection Threshold . | ||