ThePCIe subsystem supports the following main features:
- Dual mode – root port (RP) or end point (EP) modes. Selectable through bootstrap pins.
- 1-lane configuration with up to 5.0GT/lane.
- 62.5/125 MHz operation on PIPE interface for Gen1/Gen2 respectively
- Constant 32-bit PIPE width for Gen1/Gen2 modes
- Maximum outbound payload size of 128 bytes
- Maximum inbound payload size of 128 bytes
- Maximum remote read request size of 4K bytes
- Maximum number of nonposted outstanding transactions: 8 on each VBUSM interface.
- Four virtual channels (4VC)
- Resizable BAR capability
- SRIS support
- Power Management
- L1 Power Management Substate support
- D1 support
- L1 Power Shutoff support
- Legacy, MSI, and MSI-X interrupt support
- 32 outbound address translation regions
- Precision time measurement (PTM)
For more information, see Peripheral Component Interconnect Express (PCIe) Subsystem section in Peripherals chapter in the device TRM.