Refer to the PDF data sheet for device specific package drawings
The device has integrated two identical Programmable Real-Time Unit Subsystem and Industrial Communication Subsystems - Gigabit (PRU_ICSSG), PRU_ICSSG0 and PRU_ICSSG1. The programmable nature of the PRU cores, along with their access to pins, events and all device resources, provides flexibility in implementing fast real-time responses, specialized data handling operations, custom peripheral interfaces, and in offloading tasks from the other processor cores in the device.
For more details about features and additional description information on the device PRU_ICSSG, see the corresponding subsections within Signal Descriptions and Detailed Description sections.
The PRU_ICSSG0 and PRU_ICSSG1 support an internal wrapper multiplexing that expands the device top-level multiplexing.