Digital Controller for DLP3000 DMD
Product details
Parameters
Package | Pins | Size
Features
- Required for Reliable Operation of the DLP3000
DMD - Multi-Mode, 24-Bit Input Port:
- Supports Parallel RGB With Pixel Clock Up to
33.5 MHz and 3 Input Color Bit-Depth Options:- 24-Bit RGB888 or 4:4:4 YCrCb888
- 18-Bit RGB666 or 4:4:4 YCrCb666
- 16-Bit RGB565 or 4:2:2 YCrCb565
- Supports 8-Bit BT.656 Bus Mode With Pixel
Clock Up to 33.5 MHz
- Supports Parallel RGB With Pixel Clock Up to
- Supports Input Resolutions 608 × 684, 864 × 480,
854 × 480 (WVGA), 640 × 480 (VGA), 320 × 240
(QVGA) - Pattern Input Mode
- One-to-One Mapping of Input Data to
Micromirrors - 1-Bit Binary Pattern Rates up to 4000-Hz
- 8-Bit Grayscale Pattern Rates up to 120-Hz
- One-to-One Mapping of Input Data to
- Video Input Mode with Pixel Data Processing
- Supports 1- to 60-Hz Frame Rates
- Programmable Degamma
- Spatial-Temporal Multiplexing (Dithering)
- Automatic Gain Control
- Color Space Conversion
- Output Trigger Signal for Synchronizing With
Camera, Sensor, or Other Peripherals - System Control:
- I2C Control of Device Configuration
- Programmable Current Control of up to 3 LEDs
- Integrated DMD Reset Driver Control
- DMD Horizontal and Vertical Display Image
Flip
- Low-Power Consumption: Less than 93 mW
(Typical) - External Memory Support:
- 166-MHz Mobile DDR SDRAM
- 33.3-MHz Serial FLASH
- 176-Pin, 7 × 7 mm With 0.4-mm Pitch NFBGA
Package
Description
The DLPC300 controller provides a convenient, multi-functional interface between user electronics and the DMD, enabling high-speed pattern rates (up to 4-kHz binary), providing LED control, and data formatting for multiple input resolutions. The DLPC300 digital controller, part of the DLP3000 chipset, is required for reliable operation of the DLP3000 DMD. The DLPC300 also outputs a trigger signal for synchronizing displayed patterns with a camera, sensor, or other peripherals.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | DLPC300 DLP® Digital Controller for the DLP3000 DMD datasheet (Rev. C) | Aug. 01, 2015 |
* | Errata | DLP® LightCrafter™ NAND Failures Resolution | Dec. 23, 2013 |
* | Errata | DLP® LightCrafter™ USB Connectivity Solutions (Rev. A) | Aug. 16, 2012 |
User guide | Portable Point Cloud Generation 3D Scanning Using DLP Technology User's Guide (Rev. A) | May 13, 2016 | |
User guide | DLP Software Development Kit (SDK) User's Guide | Apr. 28, 2016 | |
Application note | Creating Multiple Bit Depth and Multiple Color Pattern Sequences for the DLP® Li (Rev. A) | Oct. 29, 2013 | |
Application note | DLP® LightCrafter™ FPGA Overview | Aug. 27, 2013 | |
Application note | DLP 0.3 WVGA Chipset Data Sheet (Rev. A) | Jul. 31, 2013 | |
User guide | DLPC300 Programmer's Guide (Rev. B) | Jul. 24, 2013 | |
More literature | DLP 0.3 WVGA Chipset | Apr. 18, 2012 | |
White paper | Using the DLP LightCrafter to Trigger CCD Cameras from the Imaging Source | Mar. 14, 2012 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Software development
Features
Configuration firmware for the DLPC300. Enables the 0.3 WVGA chipset to display high speed, native resolution patterns with user selectable bit depths and pattern rates. This firmware also allows users to display high quality, wide aspect ratio video and images at multiple resolutions.
Design tools & simulation
Reference designs
Design files
-
download TIDA-00361 BOM.pdf (92KB) -
download TIDA-00361 Camera Trigger Cable Assembly.pdf (34KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
NFBGA (ZVB) | 176 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
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