Product details


Output options Adjustable Output, Negative Output Iout (Max) (A) 1 Vin (Max) (V) -3 Vin (Min) (V) -36 Vout (Max) (V) -1.2 Vout (Min) (V) -33 Noise (uVrms) 16 Iq (Typ) (mA) 0.21 Thermal resistance θJA (°C/W) 31 Load capacitance (Min) (µF) 10 Rating Catalog Regulated outputs (#) 1 Features Enable, Soft Start Accuracy (%) 2.5 PSRR @ 100 KHz (dB) 64 Dropout voltage (Vdo) (Typ) (mV) 290 Operating temperature range (C) -40 to 125 open-in-new Find other Linear regulators (LDO)

Package | Pins | Size

VQFN (RGW) 20 25 mm² 5 x 5 open-in-new Find other Linear regulators (LDO)


  • Input Voltage Range: –3 V to –36 V
  • Noise:
    • 16 µVRMS (10 Hz to 100 kHz)
  • Power-Supply Ripple Rejection:
    • 72 dB (10 kHz)
  • Adjustable Output: –1.18 V to –33 V
  • Maximum Output Current: 1 A
  • Stable With Ceramic Capacitors ≥ 10 µF
  • Built-In Current-Limit and Thermal Shutdown
  • Available in an External Heatsink-Capable, High
    Thermal Performance TO-220 Package
  • Operating Temperature Range:
    –40°C to 125°C
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The TPS7A33 series of linear regulators are negative voltage (–36 V), ultralow-noise (16-µVRMS, 72-dB PSRR) linear regulators capable of sourcing a maximum load of 1 A.

The TPS7A33 series include a complementary metal oxide semiconductor (CMOS) logic-level-compatible enable pin (EN) to allow for user-customizable power management schemes. Other features available include built-in current limit and thermal shutdown features to protect the device and system during fault conditions.

The TPS7A33 family is designed using bipolar technology primarily for high-accuracy, high-precision instrumentation applications, where clean voltage rails are critical to maximize system performance. This feature makes it ideal to power operational amplifiers, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other high-performance analog circuitry.

In addition, the TPS7A33 family of linear regulators is suitable for post DC-DC converter regulation. By filtering out the output voltage ripple inherent to DC-DC switching conversion, maximum system performance is ensured in sensitive instrumentation, medical, test and measurement, audio, and RF applications.

For applications where positive and negative high-performance rails are required, consider the TPS7A4700 positive high-voltage, ultralow-noise, low-dropout linear regulator as well.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 8
Type Title Date
* Datasheet TPS7A33 –36-V, 1-A, Ultralow-Noise Negative Voltage Regulator datasheet (Rev. D) Oct. 18, 2013
Application notes A Topical Index of TI LDO Application Notes (Rev. F) Jun. 27, 2019
Technical articles Design a pre-tracking regulator, part 2: for a negative LDO Apr. 26, 2019
Technical articles LDO basics: capacitor vs. capacitance Aug. 01, 2018
Technical articles LDO Basics: Preventing reverse current Jul. 25, 2018
Technical articles LDO basics: introduction to quiescent current Jun. 20, 2018
Selection guides Low Dropout Regulators Quick Reference Guide (Rev. P) Mar. 21, 2018
Selection guides TI Components for Aerospace and Defense Guide (Rev. E) Mar. 22, 2017

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide

The DDC2256AEVM evaluation module  (EVM)  is  an  evaluation  kit  for the DDC2256A,  a  256-channel,  current  input,  24-bit analog-to-digital (A/D) converter. The EVM kit, comprised of a DUT board and a capture board, contains two DDC2256A (...)

  • All-in-one solution for evaluating two DDC2256A devices in a system-like setting
  • On-board FPGA, memory, and USB interface allow for data capture and analysis of large sample datasets
  • Flexible supply configurations for simple or advanced experimentation
  • Various input voltage configurations allow for (...)
document-generic User guide
The TPS7A3301EVM-061 evaluation module (EVM) helps you evaluate the performance of the TPS7A33 low-dropout (LDO) linear regulator. The TPS7A33 device is a –36-V input, –1-A, ultra-low-noise, negative voltage LDO linear regulator. The EVM is a standalone evaluation (...)
  • Input voltage range: –3 V to –36 V
  • Noise: 14 μVRMS (20 Hz, 20 kHz), 15.1 μVRMS (10 Hz, 100 kHz)
  • Power-supply ripple rejection: 65 dB (1 kHz)
  • Fixed output: –15 V
  • Dropout voltage: 0.6 V at 1 A
  • Stable with ceramic capacitors ≥ 10 μF
  • CMOS logic level-compatible enable
  • Thermal shutdown protection
  • Overcurrent (...)

Design tools & simulation

SBVM105.ZIP (32 KB) - PSpice Model
SBVM399.ZIP (12 KB) - TINA-TI Reference Design
SBVM400.ZIP (5 KB) - TINA-TI Spice Model
SBVM665.ZIP (0 KB) - PSpice Model

Reference designs

Reference design synchronizing data converter DDC and NCO features for multi-channel RF systems
TIDA-010122 — This reference design provides the solution for synchronization design challenges associated with emerging 5G adapted applications like massive multiple input multiple output (mMIMO), phase array RADAR and communication payload. The typical RF front end contains antenna, low noise amplifier (LNA (...)
document-generic Schematic document-generic User guide
12.8-GSPS analog front end reference design for high-speed oscilloscope and wide-band digitizer
TIDA-01028 — This reference design provides a practical example of interleaved RF-sampling analog-to-digital converters (ADCs) to achieve a 12.8-GSPS sampling rate. This is achieved by time-terleaving two RF-sampling ADCs. Interleaving requires a phase shift between the ADCs, which this reference design achieves (...)
document-generic Schematic document-generic User guide
Scalable 20.8 GSPS reference design for 12 bit digitizers
TIDA-010128 — This reference design describes a 20.8 GSPS sampling system using RF sampling analog-to-digital converters (ADCs) in time interleaved configuration. Time interleaving method is a proven and traditional way of increasing sample rate, however, matching individual ADCs offset, gain and sampling time (...)
document-generic Schematic document-generic User guide
Low noise power-supply reference design maximizing performance in 12.8 GSPS data acquisition systems
TIDA-01027 — This reference design demonstrates an efficient, low noise 5-rail power-supply design for very high-speed DAQ systems capable of > 12.8 GSPS. The power supply DC/DC converters are frequency synchronized and phase-shifted in order to minimize input current ripple and control frequency content (...)
document-generic Schematic document-generic User guide
Low-Noise Fixed Drop-Out ±2.5 to ±12-VOUT 3A Power Supply Reference Design for Ultrasound CW Pulser
TIDA-01458 — This reference design allows a digitally programmable power supply to power an ultrasound transmit circuit for continuous wave (CW) mode from a 24-V bus. There are two outputs adjustable from ±2.5 to ±12 V under user software control. These outputs can provide up to 2 A with very low (...)
document-generic Schematic document-generic User guide
Flexible 3.2-GSPS multi-channel AFE reference design for DSOs, radar and 5G wireless test systems
TIDA-01022 — This high speed multi-channel data capture reference design enables optimum system performance. System designers needs to consider critical design parameters like clock jitter and skew for high speed multi-channel clock generation, which affects overall system SNR, SFDR, channel to channel skew and (...)
document-generic Schematic document-generic User guide
Programmable ±100-V, High-Current, Floating Linear Regulator Reference Design for Ultrasound Systems
TIDA-01371 — Ultrasound transmitters require a stable programmable DC power source to drive high current into piezo transducers during the transmission. The TIDA-01371 reference design demonstrates a positive and negative linear regulator that can provide output voltages varying from ±2.5 to ±100V (...)
document-generic Schematic document-generic User guide
High-Bandwidth Arbitrary Waveform Generator Reference Design: DC or AC coupled, High-Voltage output
TIDA-00684 — In TIDA-00684 reference design a quad-channel TSW3080 evaluation module (EVM) is developed to shows how to use an active amplifier interface with the DAC38J84 to demonstrate an arbitrary-waveform-generator frontend. The DAC38J84 provides four DAC channels with 16 bits of resolution with a maximum (...)
document-generic Schematic document-generic User guide
2.2MHz Switching, Synchronous Split Supply Reference Design for 12V Battery with all Protections
PMP10651 PMP10651 is a low noise, multi-output SMPS design where LM53603 is used in Inverting Buck-Boost Fly buck topology to generate positive and negative supply needed in multiple noise sensitive applications such as powering High Speed Video Amplifier, RF amplifier, Precision Low noise amplifier (...)
document-generic Schematic document-generic User guide
40V Dual 1A Power Module w/Low Noise LDOs Split-Rail (±5V) Output Voltages Reference Design
PMP8372 The PMP8372 design is optimized for small size and uses the TPS84250 step-down power module on the top- side with the TPS84259 negative output power module on the bottom-side to implement both positive and negative output voltages from a 12V/24V source. The output voltages can be adjusted from +/-3V (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

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VQFN (RGW) 20 View options

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