DLPC964-APPS-FPGA-FW — DLPC964 Apps FPGA Configuration Firmware
支援產品和硬體
產品
DLP 控制器和驅動器
- DLPC964 — DLP991UFLV 數位微鏡裝置 (DMD) 的 DLP® 控制器
硬體開發
開發板
- DLPLCRC964EVM — DLPC964 DLP® LightCrafter™ 評估模組
The DLPC964 controller works with the DLP991U digital micromirror device (DMD). The controller provides a high-speed data and control interface for the DMD to enable binary pattern rates up to 12.4kHz. These fast pattern rates set DLP technology apart from other spatial light modulators and offer a strategic advantage for equipment needing fast, accurate, and programmable light steering capability. The DLPC964 provides the required clocking pulses and timing information to the DMD. The unique capability and value offered by the controller make it well-suited to support a wide variety of direct imaging, industrial, and advanced display applications.
In DLP-based electronics solutions, image data is 100% digital from the DLPC964 input port to the projected image. The image stays in digital form and is never converted into an analog signal. The DLPC964 processes the digital input image and converts the data into a format needed by the DMD for proper display. The DMD then steers the light to the location determined by the pixel data loaded into the DMD.
For complete electrical and mechanical specifications of the DLPC964, see the AMD VirtexTM 7 product specification.
Get started with TI DLP® light-control technology page to learn how to get started with the DLPC964.
The DLP advanced light control resources on ti.com accelerate time to market, which include evaluation modules, optical modules manufacturers, and DLP design network partners.
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | DLPC964 Digital Micromirror Device Controller datasheet (Rev. A) | PDF | HTML | 2024年 9月 5日 |
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
DLPLCR99EVM 是 DMD 板 EVM,內含 0.99 吋 4K、Type-A DMD,內含 4096 x 2176 微鏡,且具有 5.4-µm 節距。DLP991U DMD 在高解析度下提供 ~8.9-M 像素,具大型曝光區域。與 DLPLCRC964EVM配對時,使用者可在各種位元深度和曝光時間達到快速模式速率,以符合工業應用所需。
DLPC964 DLP® LightCrafter™ 評估模組 (EVM) 提供參考設計,為支援 DLP991U DMD 的 DLPC964 控制器架構的使用者提供更快的開發週期。此平台從外部 FPGA 主機板接收高速位元平面資料,並在載入至 DLPLCR99EVM 以在 DLP991U DMD 上顯示之前,格式化該位元平面資料。
The DLP991U Development Kit is a state-of-the-art programmable and complete DLP evaluation kit tailored for OEMs, engineers and researchers pushing the boundaries of optical precision. Designed around the 0.99” 4K DLP chip, it offers unmatched resolution, frame rate, and pattern control for (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| FCBGA (ZUM) | 1156 | Ultra Librarian |
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。
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Copyright © 2024 Texas Instruments Incorporated - http://www.ti.com/
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Product name: DLP® Lightcrafter DLPC964 GUI
Version: 1.0.0
Date: 14-Feb-2024
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DESCRIPTION
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DLP® Lightcrafter DLPC964 GUI
The DLP® Lightcrafter DLPC964, is an evaluation platform to experiment and develop with the DLP991U and DLPC964 chips.
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FEATURES
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1. Reset individual blocks or global reset
2. Clear individual blocks or global clear
3. Set individual blocks or global set
4. Display internal test patterns
Included in the DLPR964-FW.zip file are:
1 - the readme.txt file
2 - the DLPC964 Controller dlpc964_v1.1.92.mcs file for programming the Controller flash memory using Vivado.
When using Vivado to program the DLPC964 Controller, use the above files when requested.
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Copyright © 2025 Texas Instruments Incorporated - http://www.ti.com/
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Product name: DMD Diffraction Efficiency Calculator
Version: 2.0.0.0
Date: September 2025
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DESCRIPTION
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The DMD Diffraction Efficiency Calculator is used to help customers understand how to model DMD diffraction patterns and diffraction efficiency with their specific DMD input parameters and will be modeled to the customers specific design.
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REVISION HISTORY
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* Version 1.00.00.00 - Initial release
* Version 1.00.00.0B - Added Gaussian pupil apodization for adjustable beam profile weighting
* Version 1.00.00.0C - Added Disclaimer note in DLPU040 User's Guide (Abstract Section - Page 1)
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RESTRICTIONS
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* Tested on Windows 10.
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CONTACT US
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At http://e2e.ti.com/
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The DLP optical design guidelines presentation provides a comprehensive overview of the guidelines specific to designing an optical system with DLP Products and will help enable customers in their design process.
The design resource accessed as www.ti.com/lit/zip/dlpr115 or www.ti.com/lit/xx/dlpr115/dlpr115.zip has been migrated to a new user experience at www.ti.com/tool/download/DLPR115. Please update any bookmarks accordingly.
Included in the DLPC964-APPS_FPGA-FW.zip file are:
1 - The readme.txt file
2- The Apps FPGA VC707 VHDL code for the DLPC964 Controller
3 - The application FPGA appstop.mcs file for programming the VC707 flash memory using Vivado.
4 - The application FPGA appstop.prm file for programming the VC707 flash memory using Vivado.