SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Epwm clock sync.
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| Instance Name | Physical Address |
|---|---|
| CONTROLSS_GLOBAL_CTRL | 502F 0010h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| EPWM_CLKSYNC_BIT | |||||||
| R/W | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| EPWM_CLKSYNC_BIT | |||||||
| R/W | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| EPWM_CLKSYNC_BIT | |||||||
| R/W | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| EPWM_CLKSYNC_BIT | |||||||
| R/W | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:0 | EPWM_CLKSYNC_BIT | R/W | 0h | EPWM clock sync for each EPWM instance. Set the bit corresponding to the instance number to enable that EPWM instance. When set, all enabled EPWM module clocks are started with the first rising edge of TBCLK aligned.Refer to TRM for more details. Writing 1'b1 will allow to enable corresponding EPWM instance Writing 1'b0 will disable corresponding EPWM instance. |