SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
ADC PPB4 Partial Min Index Register.
Return to Summary Table
| Instance Name | Physical Address |
|---|---|
| ADC0_G0_G5 | 502C 01F8h |
| ADC1_G0_G5 | 502C 11F8h |
| ADC2_G0_G5 | 502C 21F8h |
| ADC3_G0_G5 | 502C 31F8h |
| ADC4_G0_G5 | 502C 41F8h |
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED_1 | PMINI | ||||||
| R | R | ||||||
| 0h | 0h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| PMINI | |||||||
| R | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 15:10 | RESERVED_1 | R | 0h | Reserved |
| 9:0 | PMINI | R | 0h | Post Processing Block 4 Oversampling Partial Index of Min. Each time a new result propagates through the PPB signal chain and latches into ADCPPB4RESULT if the result replaces PMIN this register is loaded with the current value of PCOUNT. This register is reset when either a count-match event occurs [PCOUNT = LIMIT] or PPB4 receives a sync. event. This result is available 1 SYSCLK cycle after the associated ADCPPB4RESULT is available. This will be 2 SYSCLK cycles after the associated ADCRESULT is available, unless multiple PPBs point to the same SOC [refer to the ADCPPB4RESULT timing information]. |