SPRUJ42 User guide

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

12.2.60.1 CFG_RXF1A Register (Offset = 2B8h) [reset = 0h]

Rx FIFO 1 Acknowledge register. FIFO 1 acknowledge last index of read buffers, updates get index and fill level.

Table 5-1492 Instance Table

Figure 5-736 CFG_RXF1A Name Register

Table 5-1493 CFG_RXF1A Register Field Descriptions

Bit	Field	Type	Reset	Description
31:6	NU55	R	0h	Reserved
5:0	F1AI	R/W	0h	Rx FIFO 1 Acknowledge Index After the Host CPU has read a message or a sequence of messages from Rx FIFO 1 it has to write the buffer index of the last element read from Rx FIFO 1 to the MCAN_RXF1A[5-0] F1AI field. This will set the Rx FIFO 1 Get Index MCAN_RXF1S[13-8] F1GI field to the MCAN_RXF1A[5-0] F1AI field + 1 and update the FIFO 1 Fill Level MCAN_RXF1S[6-0] F1FL field.