SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
ADC Linearity Trim Control Register.
Return to Summary Table
| Instance Name | Physical Address |
|---|---|
| ADC0_G0_G5 | 502C 00FCh |
| ADC1_G0_G5 | 502C 10FCh |
| ADC2_G0_G5 | 502C 20FCh |
| ADC3_G0_G5 | 502C 30FCh |
| ADC4_G0_G5 | 502C 40FCh |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| KEY | |||||||
| R/W | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| KEY | |||||||
| R/W | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED_1 | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED_1 | CALIBSTEP | CALIBMODE | |||||
| R | R/W | R/W | |||||
| 0h | 0h | 0h | |||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:16 | KEY | R/W | 0h | ADC Linearity Trim Control Write Key. Any write to this register must contain the value 0xA5A5 in these bit locations. If a write request attempts to load any other value into these bits, the write for the entire register is ignored. These bits always read back a zero. |
| 15:6 | RESERVED_1 | R | 0h | Reserved |
| 5:1 | CALIBSTEP | R/W | 0h | ADC Linearity Calibration Step. Defines which of the 24 steps of calibration is to be executed. Never set this bit field while the ADC SELFTRIM is in progress. The R-M-W operation could unintentionally set the CALIBMODE bit again. |
| 0 | CALIBMODE | R/W | 0h | ADC Linearity Calibration Mode. |