SPRUJ42 User guide

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

21.2.24.1 QSPI_SPI_SETUP3 Register (Offset = 60h) [reset = 20203h]

Memory Mapped SPI Setup3 Register.

Table 5-2170 Instance Table

Instance Name	Physical Address
QSPI0	4820 0060h

Figure 5-1068 QSPI_SPI_SETUP3 Name Register

Table 5-2171 QSPI_SPI_SETUP3 Register Field Descriptions

Bit	Field	Type	Reset	Description
31:29	RESERVED2	R	0h	Always read as 0
28:24	NUM_D_BITS	R/W	0h	Number of dummy bits to use if NUM_D_BYTES = 0
23:16	WCMD	R/W	2h	Write Command
15:14	RESERVED1	R	0h	Always read as 0
13:12	READ_TYPE	R/W	0h	Determines if the read command is a single, dual or quad read mode command 00 Normal read [all data input on spi_din] 01 Dual read [odd bytes input on spi_din; even on spi_dout] 10 Normal read [all data input on spi_din] 11 Quad read [uses spi_qdin0/1]
11:10	NUM_D_BYTES	R/W	0h	Number of dummy bytes to be used for fast read. 0 = use the value in NUM_D_BITS 1 = use 8 bits; 2 = use 16 bits; 3 = use 24 bits
9:8	NUM_A_BYTES	R/W	2h	Number of address bytes to be sent. 0 = 1 byte; 1 = 2 bytes; 2 = 3 bytes; 3 = 4 bytes
7:0	RCMD	R/W	3h	Read Command