SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
ECC Error Control2 Register.
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| Instance Name | Physical Address |
|---|---|
| R5SS0 | 5300 001Ch |
| R5SS1 | 5300 401Ch |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| ECC_BIT2 | |||||||
| R/W | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| ECC_BIT2 | |||||||
| R/W | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| ECC_BIT1 | |||||||
| R/W | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| ECC_BIT1 | |||||||
| R/W | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:16 | ECC_BIT2 | R/W | 0h | Data bit that needs to be flipped if double bit error needs to be forced |
| 15:0 | ECC_BIT1 | R/W | 0h | Data bit that needs to be flipped when force_sec is set |