SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
FIFO Control Register for Ch2.
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| Instance Name | Physical Address |
|---|---|
| SDFM0 | 5026 805Ah |
| SDFM1 | 5026 905Ah |
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| OVFIEN | DRINTSEL | FFEN | FFIEN | RESERVED_2 | SDFFST | ||
| R/W | R/W | R/W | R/W | R | R | ||
| 0h | 0h | 0h | 0h | 0h | 0h | ||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| SDFFST | RESERVED_1 | SDFFIL | |||||
| R | R | R/W | |||||
| 0h | 0h | 0h | |||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 15 | OVFIEN | R/W | 0h | SDFIFO Overflow interrupt enable 0:SDFIFO Overflow condition will not generate an interrupt 1:SDFIFO overflow condition generates an interrupt on SDy_ERR |
| 14 | DRINTSEL | R/W | 0h | Data-Ready Interrupt [DRINT] source select 0 = AF1 [Select non-FIFO data-ready interrupt] 1 = SDFFINT1 [Select FIFO data-ready interrupt] |
| 13 | FFEN | R/W | 0h | SDFIFO Enable 0: Disable FIFO operation 1: Enable FIFO operation Note: When FIFO is disabled, FIFO contents are cleared |
| 12 | FFIEN | R/W | 0h | SDFIFO data ready Interrupt Enable |
| 11 | RESERVED_2 | R | 0h | Reserved |
| 10:6 | SDFFST | R | 0h | SDFIFO Status 00000 FIFO empty 00001 FIFO has 1 word . . . . 10000 FIFO has 16 words |
| 5 | RESERVED_1 | R | 0h | Reserved |
| 4:0 | SDFFIL | R/W | 0h | SDFIFO interrupt level bits The FIFO will generate an interrupt when the FIFO status [SDFFST] '= FIFO level [SDFFIL ] |