SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Control Parameter Register for Ch3.
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| Instance Name | Physical Address |
|---|---|
| SDFM0 | 5026 8060h |
| SDFM1 | 5026 9060h |
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED_4 | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED_3 | SDDATASYNC | RESERVED_2 | SDCLKSYNC | SDCLKSEL | RESERVED_1 | MOD | |
| R | R/W | R | R/W | R/W | R/W | R/W | |
| 0h | 0h | 0h | 0h | 0h | 0h | 0h | |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 15:8 | RESERVED_4 | R | 0h | Reserved |
| 7 | RESERVED_3 | R | 0h | Reserved |
| 6 | SDDATASYNC | R/W | 0h | 0: SD Data is not passed through a synchronizer. 1:SD Data is passed through a synchronizer. |
| 5 | RESERVED_2 | R | 0h | Reserved |
| 4 | SDCLKSYNC | R/W | 0h | 0: SD Clock is not passed through a synchronizer. 1:SD Clock is passed through a synchronizer. |
| 3 | SDCLKSEL | R/W | 0h | SD3 Clock source select. 0:Clock source to SDFM filter is its channel clock. 1:Clock source to SDFM filter is SD1 filter clock. |
| 2 | RESERVED_1 | R/W | 0h | Reserved |
| 1:0 | MOD | R/W | 0h | Modulator clock modes 0:Mode 0:Modulator clock running at 1x data rate 1:Reserved 2:Reserved 3:Reserved |