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DS90UB633A-Q1

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1M pixel ADAS 60-100MHz PCLK serializer

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Data sheet

DS90UB633A-Q1

ACTIVE
Data sheet Order now

Product details

Applications Advanced Driver Assistance Systems (ADAS) Input compatibility LVCMOS Function Serializer Output compatibility FPD-Link III LVDS Color depth (bpp) 12 Features Low-EMI Point-to-Point Communication Signal conditioning Adaptive Equalizer EMI reduction LVDS Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105
Applications Advanced Driver Assistance Systems (ADAS) Input compatibility LVCMOS Function Serializer Output compatibility FPD-Link III LVDS Color depth (bpp) 12 Features Low-EMI Point-to-Point Communication Signal conditioning Adaptive Equalizer EMI reduction LVDS Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105
WQFN (RTV) 32 25 mm² (5 mm × 5 mm)
  • AEC-Q100 qualified for automotive applications with the following results:
    • Device temperature grade 2: –40°C to +105°C ambient operating temperature
  • 56.25-MHz to 100-MHz input pixel clock support
  • Robust Power-Over-Coaxial (PoC) operation
  • Programmable data payload:
    • 8/10-Bit payload 75-MHz to 100-MHz
    • 12-Bit payload 56.25-MHz to 100-MHz
  • Continuous low latency bidirectional control interface channel with I2C support at 400-kHz
  • Embedded clock with DC-balanced coding to support AC-coupled interconnects
  • Capable of driving up to 15-m coaxial or Shielded Twisted-Pair (STP) cables
  • 4 Dedicated General-Purpose Input/Output (GPIO)
  • 1.8-V, 2.8-V or 3.3-V compatible parallel inputs on serializer
  • Single power supply at 1.8-V
  • ISO 10605 and IEC 61000-4-2 ESD compliant
  • Compatible with DS90UB66x-Q1 and DS90UB63x-Q1 deserializers
  • AEC-Q100 qualified for automotive applications with the following results:
    • Device temperature grade 2: –40°C to +105°C ambient operating temperature
  • 56.25-MHz to 100-MHz input pixel clock support
  • Robust Power-Over-Coaxial (PoC) operation
  • Programmable data payload:
    • 8/10-Bit payload 75-MHz to 100-MHz
    • 12-Bit payload 56.25-MHz to 100-MHz
  • Continuous low latency bidirectional control interface channel with I2C support at 400-kHz
  • Embedded clock with DC-balanced coding to support AC-coupled interconnects
  • Capable of driving up to 15-m coaxial or Shielded Twisted-Pair (STP) cables
  • 4 Dedicated General-Purpose Input/Output (GPIO)
  • 1.8-V, 2.8-V or 3.3-V compatible parallel inputs on serializer
  • Single power supply at 1.8-V
  • ISO 10605 and IEC 61000-4-2 ESD compliant
  • Compatible with DS90UB66x-Q1 and DS90UB63x-Q1 deserializers

The DS90UB633A-Q1 device offers an FPD-Link III interface with a high-speed forward channel and a bidirectional control channel for data transmission over a single coaxial cable or differential pair. The DS90UB633A-Q1 device incorporates differential signaling on both the high-speed forward channel and bidirectional control channel data paths. The serializer/deserializer pair is targeted for connections between imagers and video processors in an electronic control unit (ECU). This device is ideally suited for driving video data requiring up to 12-bit pixel depth plus two synchronization signals along with bidirectional control channel bus.

Using TI’s embedded clock technology allows transparent full-duplex communication over a single differential pair, carrying asymmetrical-bidirectional control channel information. This single serial stream simplifies transferring a wide data bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. This significantly saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins. Internal DC-balanced encoding/decoding is used to support AC-coupled interconnects.

The DS90UB633A-Q1 device offers an FPD-Link III interface with a high-speed forward channel and a bidirectional control channel for data transmission over a single coaxial cable or differential pair. The DS90UB633A-Q1 device incorporates differential signaling on both the high-speed forward channel and bidirectional control channel data paths. The serializer/deserializer pair is targeted for connections between imagers and video processors in an electronic control unit (ECU). This device is ideally suited for driving video data requiring up to 12-bit pixel depth plus two synchronization signals along with bidirectional control channel bus.

Using TI’s embedded clock technology allows transparent full-duplex communication over a single differential pair, carrying asymmetrical-bidirectional control channel information. This single serial stream simplifies transferring a wide data bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. This significantly saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins. Internal DC-balanced encoding/decoding is used to support AC-coupled interconnects.
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* Data sheet DS90UB633A-Q1 60-MHz to 100-MHz FPD-Link III Serializer datasheet (Rev. A) PDF | HTML Nov 12, 2020

Design & development

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Evaluation board

DS90UB933-Q1EVM — 100-MHz 12-bit DS90UB933-Q1 FPD-Link III serializer for STP or coaxial cable evaluation module

The DS90UB933-Q1EVM evaluation module (EVM) helps you evaluate the operation and performance of the DS90UB933-Q1 37.5-MHz to 100-MHz FPD-Link III serializer (SER). The device translates 10 or 12 bits of LVCMOS data into a high-speed serialized FPD-Link III interface transported over a single (...)
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To get started with Analog LaunchPad (ALP) software: Download and install the ALP Framework Utility. Add new device profiles and example scripts with the ALP-PROFILE-UPDATE tool.
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DS90UB633A-Q1 IBIS Model

SLNM006.ZIP (79 KB) - IBIS model
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WQFN (RTV) 32 Ultra Librarian
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