5 to 85 MHz 24-bit Color FPD-Link III Serializer with HDCP



Product details


Function Serializer Color depth (bpp) 24 Pixel clock frequency (Min) (MHz) 5 Pixel clock frequency (Max) (MHz) 85 Input compatibility LVCMOS Output compatibility FPD-Link III LVDS Features HDCP, I2C Config, I2S Audio, Remote Interrupt Pin Mirroring Signal conditioning DC Balance EMI reduction SSC Compatible Diagnostics BIST Throughput (Mbps) 2040 Operating temperature range (C) -40 to 105 open-in-new Find other Display SerDes

Package | Pins | Size

WQFN (RHS) 48 49 mm² 7 x 7 open-in-new Find other Display SerDes


  • Integrated HDCP Cipher Engine with On-chip Key Storage
  • Bidirectional Control Interface Channel Interface with I2C
    Compatible Serial Control Bus
  • Supports High Definition (720p) Digital Video Format
  • RGB888 + VS, HS, DE and I2S Audio Supported
  • 5 – 85 MHz PCLK Supported
  • Single 3.3 V Operation with 1.8 V or 3.3 V Compatible
    LVCMOS I/O Interface
  • AC-coupled STP Interconnect up to 10 meters
  • Parallel LVCMOS Video Inputs
  • DC-balanced & Scrambled Data with Embedded Clock
  • Supports HDCP Repeater Application
  • Dedicated Interrupt Pin for Remote Interrupts
  • Internal Pattern Generation
  • Low Power Modes Minimize Power Dissipation
  • Automotive Grade Product: AEC-Q100 Grade 2 Qualified
  • >8 kV HBM and ISO 10605 ESD rating
  • Backward Compatible Modes
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The DS90UH925AQ serializer, in conjunction with the DS90UH926Q deserializer, provides a solution for secure distribution of content-protected digital video within automotive entertainment systems. This chipset translates a parallel RGB Video Interface into a single pair high-speed serialized interface. The digital video data is protected using the industry standard HDCP copy protection scheme. The serial bus scheme, FPD-Link III, supports video and audio data transmission and full duplex control including I2C communication over a single differential link. Consolidation of video data and control over a single differential pair reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design.

The DS90UH925AQ serializer embeds the clock, content protects the data payload, and level shifts the signals to high-speed low voltage differential signaling. Up to 24 RGB data bits are serialized along with three video control signals and up to two I2S data inputs.

EMI is minimized by the use of low voltage differential signaling, data scrambling and randomization and spread spectrum clocking compatibility.

The HDCP cipher engine is implemented in the serializer and deserializer. HDCP keys are stored in on-chip memory.

Remote interrupts from the downstream DS90UH926Q deserializer are mirrored to a local output pin.

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Technical documentation

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Type Title Date
* Datasheet DS90UH925AQ-Q1 720p 24-bit Color FPD-Link III Serializer with HDCP datasheet Jan. 23, 2014
Technical article How to choose a power supply for an automotive camera module Sep. 17, 2020
User guide DS90UH925AQEVM User's Guide Jun. 20, 2014

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