5 - 85 MHz 24-bit Color FPD-Link III Serializer with HDCP
Product details
Parameters
Package | Pins | Size
Features
- Integrated HDCP Cipher Engine with On-chip Key
Storage - Bidirectional Control Interface Channel Interface
with I2C Compatible Serial Control Bus - Supports High Definition (720p) Digital Video
Format - RGB888 + VS, HS, DE and I2S Audio Supported
- 5 to 85 MHz PCLK Supported
- Single 3.3V Operation with 1.8 V or 3.3 V Compatible
LVCMOS I/O Interface - AC-coupled STP Interconnect up to 10 meters
- Parallel LVCMOS Video Inputs
- DC-balanced & Scrambled Data with Embedded
Clock - HDCP Content Protected
- Supports HDCP Repeater Application
- Internal Pattern Generation
- Low Power Modes Minimize Power Dissipation
- Automotive Grade Product: AEC-Q100 Grade 2 Qualified
- > 8k V HBM and ISO 10605 ESD rating
- Backward Compatible Modes
Description
The DS90UH925Q-Q1 serializer, in conjunction with the DS90UH926Q-Q1 deserializer, provides a solution for secure distribution of content-protected digital video within automotive entertainment systems. This chipset translates a parallel RGB Video Interface into a single pair high-speed serialized interface. The digital video data is protected using the industry standard HDCP copy protection scheme. The serial bus scheme, FPD-Link III, supports video and audio data transmission and full duplex control including I2C communication over a single differential link. Consolidation of video data and control over a single differential pair reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design.
The DS90UH925Q-Q1 serializer embeds the clock, content protects the data payload, and level shifts the signals to high-speed low voltage differential signaling. Up to 24 RGB data bits are serialized along with three video control signals and up to two I2S data inputs.
EMI is minimized by the use of low voltage differential signaling, data scrambling and randomization and spread spectrum clocking compatibility.
The HDCP cipher engine is implemented in the serializer and deserializer. HDCP keys are stored in on-chip memory.
Same functionality but is not pin-for-pin or parametrically equivalent to the compared device:
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | DS90UH925Q-Q1 720p 24-bit Color FPD-Link III Serializer with HDCP datasheet (Rev. J) | Nov. 07, 2014 |
Application note | Exploring the Int Test Pattern Generation Feature of FPD-Link III IVI Devices (Rev. G) | Nov. 03, 2020 | |
Technical articles | How to choose a power supply for an automotive camera module | Sep. 17, 2020 | |
Application note | Enabling GPIOs in DS90UB925 and DS90UB926 | Nov. 10, 2015 | |
Application note | Using the I2S Audio Interface of DS90Ux92x FPD-Link III Devices | May 04, 2013 | |
Application note | I2C Communication Over FPD-Link III with Bidirectional Control Channel (Rev. A) | Apr. 26, 2013 | |
User guide | DS90UH925QSEVB User's Guide | Sep. 20, 2012 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
The DS90UH925QSEVB is an evaluation board designed to demonstrate the performance and unique features of the DS90UH925Q FPD-Link III serializer.
The DS90UH925QSEVB board is designed to drive any of TIâs compatible FPD-Link III deserializer devices. The LVCMOS inputs of the DS90UH925Q are accessible (...)
Features
- Converts parallel LVCMOS to FPD-Link III serialized data stream
- Built-in internal oscillator and pattern generator for standalone operation
- Includes I2C tool for easy device configuration
- Interoperates with compatible FPD-Link III Deserializers
Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
Reference designs
Design files
-
download TIDA-00169 BOM (SAT0059).pdf (128KB) -
download TIDA-00169 BOM (SAT0096).pdf (96KB) -
download TIDA-00169 Altium (SAT0059).zip (2011KB) -
download TIDA-00169 Altium (SAT0096).zip (1308KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
WQFN (RHS) | 48 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
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