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LMK3H0102-Q1

Name: LMK3H0102-Q1
Brand: TI
SKU: LMK3H0102-Q1
Price: 3.554 USD

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Generador de reloj automotriz sin referencia, con ondas acústicas masivas (BAW) y compatible con

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document-pdfAcrobat LMK3H0102-Q1 Reference-Less 2-Differential or 5-Single-Ended Output PCIe Gen 1-7 Compliant Programmable BAW Clock Generator datasheet (Rev. B) (Inglés) PDF | HTML

LMK3H0102-Q1

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Hoja de datos

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Detalles del producto

Number of outputs

2

Output type

LP-HCSL, LVCMOS, LVDS

Output frequency (max) (MHz)

400

Core supply voltage (V)

1.8, 2.5, 3.3

Output supply voltage (V)

1.8, 2.5, 3.3

Operating temperature range (°C)

-40 to 105

Features

I2C, One-Time Programmable (OTP) memory, PCIe Gen 1 - 7 compliant, Pin programmable, Serial interface

Rating

Automotive

Number of outputs

2

Output type

LP-HCSL, LVCMOS, LVDS

Output frequency (max) (MHz)

400

Core supply voltage (V)

1.8, 2.5, 3.3

Output supply voltage (V)

1.8, 2.5, 3.3

Operating temperature range (°C)

-40 to 105

Features

I2C, One-Time Programmable (OTP) memory, PCIe Gen 1 - 7 compliant, Pin programmable, Serial interface

Rating

Automotive

VQFN (RGT)

16

9 mm² 3 x 3

AEC-Q100 Grade 2 qualified for automotive applications
Ambient temperature: –40°C to 105°C
Functional Safety-Capable:
- Documentation available to aid functional safety system design
Integrated BAW resonator, no need for external reference
Flexible frequency generation:
- Two channel dividers: up to three unique output frequencies from 2.5MHz to 400MHz
- LVCMOS outputs supported up to 200MHz: 1.8V, 2.5V, or 3.3V
- Combination of AC-LVDS, DC-LVDS, LP-HCSL, and LVCMOS on OUT0 and OUT1 pins
Total output frequency stability: ±25ppm
2 functional modes: I2C or preprogrammed OTP
PCIe Gen 1 to Gen 7 compliant: Common Clock with or without SSC, SRNS, and SRIS
Very low PCIe jitter with SSC:
- PCIe Gen 5 Common Clock jitter: 57.5fs maximum (PCIe limit is 150fs)
- PCIe Gen 6 Common Clock jitter: 34.5fs maximum (PCIe limit is 100fs)
- PCIe Gen 7 Common Clock jitter: 29.6fs maximum (PCIe limit is 67fs)
Programmable SSC modulation depth
- Preprogrammed: –0.1%, –0.25%, –0.3%, and –0.5% down spread at 200MHz FOD frequency
- Register programmable: –0.1% to –3% down spread or ±0.05% to ±1.5% center spread
1.8V to 3.3V supply voltage
Internal LDOs with –93.1dBc PSNR at 500kHz switching noise for LP-HCSL outputs
Output-to-output skew: <50ps
Fail-safe digital input pins

AEC-Q100 Grade 2 qualified for automotive applications
Ambient temperature: –40°C to 105°C
Functional Safety-Capable:
- Documentation available to aid functional safety system design
Integrated BAW resonator, no need for external reference
Flexible frequency generation:
- Two channel dividers: up to three unique output frequencies from 2.5MHz to 400MHz
- LVCMOS outputs supported up to 200MHz: 1.8V, 2.5V, or 3.3V
- Combination of AC-LVDS, DC-LVDS, LP-HCSL, and LVCMOS on OUT0 and OUT1 pins
Total output frequency stability: ±25ppm
2 functional modes: I2C or preprogrammed OTP
PCIe Gen 1 to Gen 7 compliant: Common Clock with or without SSC, SRNS, and SRIS
Very low PCIe jitter with SSC:
- PCIe Gen 5 Common Clock jitter: 57.5fs maximum (PCIe limit is 150fs)
- PCIe Gen 6 Common Clock jitter: 34.5fs maximum (PCIe limit is 100fs)
- PCIe Gen 7 Common Clock jitter: 29.6fs maximum (PCIe limit is 67fs)
Programmable SSC modulation depth
- Preprogrammed: –0.1%, –0.25%, –0.3%, and –0.5% down spread at 200MHz FOD frequency
- Register programmable: –0.1% to –3% down spread or ±0.05% to ±1.5% center spread
1.8V to 3.3V supply voltage
Internal LDOs with –93.1dBc PSNR at 500kHz switching noise for LP-HCSL outputs
Output-to-output skew: <50ps
Fail-safe digital input pins

The LMK3H0102-Q1 is a 2-output PCIe Gen 1 to Gen 7 compliant reference-less clock generator with Spread Spectrum Clocking (SSC) support. The part is based on TI proprietary Bulk Acoustic Wave (BAW) technology and provides ±25ppm clock outputs without any crystal or external clock reference. The device can provide two SSC clocks, two non-SSC clocks, or one SSC clock and one non-SSC clock at the same time. The device meets the full PCIe compliance from Gen 1 to Gen 7, including Common Clock with or without SSC, Separate Reference No Spread (SRNS), and Separate Reference Independent Spread (SRIS).

The device can be easily configured through either pins or I2C interface. An external DC/DC can be used to power the device. Refer to Power Supply Recommendations for detailed guidelines on power supply filtering and sourcing from DC/DC.

For OTP default settings for each LMK3H0102Txx configuration, refer to the LMK3H0102 Configuration Guide.

The LMK3H0102-Q1 is a 2-output PCIe Gen 1 to Gen 7 compliant reference-less clock generator with Spread Spectrum Clocking (SSC) support. The part is based on TI proprietary Bulk Acoustic Wave (BAW) technology and provides ±25ppm clock outputs without any crystal or external clock reference. The device can provide two SSC clocks, two non-SSC clocks, or one SSC clock and one non-SSC clock at the same time. The device meets the full PCIe compliance from Gen 1 to Gen 7, including Common Clock with or without SSC, Separate Reference No Spread (SRNS), and Separate Reference Independent Spread (SRIS).

The device can be easily configured through either pins or I2C interface. An external DC/DC can be used to power the device. Refer to Power Supply Recommendations for detailed guidelines on power supply filtering and sourcing from DC/DC.

For OTP default settings for each LMK3H0102Txx configuration, refer to the LMK3H0102 Configuration Guide.

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Documentación técnica

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Documentación principal	Tipo	Título	Opciones de formato	Fecha
*	Data sheet	LMK3H0102-Q1 Reference-Less 2-Differential or 5-Single-Ended Output PCIe Gen 1-7 Compliant Programmable BAW Clock Generator datasheet (Rev. B)	PDF \| HTML	24 oct 2025
	Application note	LMK3H0102-Q1 CISPR-25 and CISPR-32 EMI Report		16 jun 2025
	Application note	Clocking Selection Guide for FPD-Link III and FPD-Link IV SerDes	PDF \| HTML	17 abr 2025
	Technical article	Beyond quartz: How BAW clocks are redefining ADAS and IVI	PDF \| HTML	09 abr 2025
	Functional safety information	LMK3H0102-Q1 Functional Safety FIT Rate, FMD and Pin FMA	PDF \| HTML	03 oct 2024

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

LMK3H0102EVM — Módulo de evaluación LMK3H0102

El módulo de evaluación LMK3H0102 proporciona una plataforma de sincronización completa para evaluar el rendimiento del reloj, la configuración de pines, la configuración del software y las características del generador de reloj LMK3H0102 con oscilador basado en BAW (onda acústica masiva) integrado.

Guía del usuario: PDF | HTML

No disponible en TI.com

Herramienta de diseño

PLLATINUMSIM-SW — PLL loop filter, phase noise, lock time, and spur simulation tool

PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.

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Opciones de descarga

Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® para TI es un entorno de diseño y simulación que ayuda a evaluar la funcionalidad de los circuitos analógicos. Esta completa suite de diseño y simulación utiliza un motor de análisis analógico de Cadence®. Disponible sin ningún costo, PSpice para TI incluye una de las bibliotecas de modelos (...)

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Encapsulado	Pines	Símbolos CAD, huellas y modelos 3D
VQFN (RGT)	16	Ultra Librarian

Se aplican los Términos y condiciones estándar de TI para los elementos de evaluación.

LMK3H0102-Q1

Generador de reloj automotriz sin referencia, con ondas acústicas masivas (BAW) y compatible con

LMK3H0102-Q1

Detalles del producto

Documentación técnica

Diseño y desarrollo

LMK3H0102EVM — Módulo de evaluación LMK3H0102

PLLATINUMSIM-SW — PLL loop filter, phase noise, lock time, and spur simulation tool

Productos y hardware compatibles

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

Pedidos y calidad

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

Serie de videos

Videos

Opciones de descarga

PLLATINUMSIM-SW — PLL loop filter, phase noise, lock time, and spur simulation tool

Búferes de reloj

Generadores de señal de reloj

Limpiadores de fluctuación de reloj

Osciladores

PLL y sintetizadores de RF

Desarrollo de hardware

Documentación

Información de la versión

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