LMK04832 JESD204B Clock Jitter Cleaner/Clock Generator/Distribution Evaluation Module


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The LMK04832 evaluation module (EVM) allows evaluation of the LMK04832 with test equipment or other evaluation boards to verify block or system requirements for use in a specific application.

LMK04832EVM is prepopulated with a 122.88-MHz VCXO for dual-loop operation. The VCXO can be substituted if a different VCXO frequency is required or a specific VCXO is desired for performance evaluation. 

The EVM can be reconfigured for single-loop operation or clock divider/delay/fanout configuration. The LMK04832 is a versatile device and the LMK04832EVM allows evaluation of the LMK04832 in its many configurations.

  • Up to three clock inputs for PLL1 operation and up to four clock inputs for PLL2 operation
  • Buffered OSCin output on OSCout port; if used, reduce one clock input
  • 14 clock outputs from internal VCO, external VCO or clock input, plus one buffered OSCin output
  • SYNC input on CLKin0 or SYNC pin for multidevice synchronization

  • LMK04832EVM

Clock jitter cleaners & synchronizers
LMK04832 Ultra-low-noise, 3.2-GHz, 15-output, JESD204B clock jitter cleaner with dual loop
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Get started

  1. Order the LMK04832EVM
  2. Download and install TICSPRO-SW and PLLATINUMSIM-SW
  3. Read the LMK04832EVM user's guide
  4. Configure registers on TICSPRO-SW and simulate performance on PLLATINUMSIM-SW

Order & start development

Evaluation board

LMK04832EVM — LMK04832 JESD204B Clock Jitter Cleaner/Clock Generator/Distribution Evaluation Module

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Technical documentation

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Type Title Date
* EVM User's guide LMK04832EVM User’s Guide (Rev. A) 21 Dec 2017
Certificate LMK04832EVM EU Declaration of Conformity (DoC) 02 Jan 2019

Related design resources

Software development

PLLATINUMSIM-SW Texas Instruments PLLatinum Simulator Tool TICSPRO-SW Texas Instruments Clocks and Synthesizers (TICS) Pro Software

Support & training

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