LMK04832EVM

LMK04832 JESD204B Clock Jitter Cleaner/Clock Generator/Distribution Evaluation Module

LMK04832EVM

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Overview

The LMK04832EVM allows evaluation of the LMK04832 with test equipment or other evaluation boards to verify block or system requirements for use in a specific application.  The LMK04832 EVM is pre-populated with a 122.88 MHz VCXO for dual loop operation.  The VCXO can be substituted if a different VCXO frequency is required or a specific VCXO is desired for performance evaluation.  The EVM can be re-configured for single loop operation or clock divider/delay/fanout configuration.  The LMK04832 is a versatile device and the LMK04832EVM allows evaluation of the LMK04832 in its many configurations.

Features
  • Up to three clocks inputs for PLL1 operation and up to four clock inputs for PLL2 operation
  • Buffered OSCin output on OSCout port.  If used, reduce one clock input
  • 14 clock outputs from internal VCO, external VCO, or clock input.  Plus one buffered OSCin output
  • SYNC input on CLKin0 or SYNC pin for multi-device synchronization

  • LMK04832EVM
  • USB2ANY

Clock jitter cleaners & synchronizers
LMK04832 Ultra low-noise JESD204B compliant clock jitter cleaner with dual loop

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Evaluation board

LMK04832EVM – LMK04832 JESD204B Clock Jitter Cleaner/Clock Generator/Distribution Evaluation Module

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Limit: 2
TI's Standard Terms and Conditions for Evaluation Items apply.

Technical documentation

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Type Title Date
* User guide LMK04832EVM User’s Guide (Rev. A) Dec. 21, 2017
Certificate LMK04832EVM EU Declaration of Conformity (DoC) Jan. 02, 2019

Related design resources

Software development

APPLICATION SOFTWARE & FRAMEWORK
PLLATINUMSIM-SW Texas Instruments PLLatinum Simulator Tool TICSPRO-SW Texas Instruments Clocks and Synthesizers (TICS) Pro Software

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