Product details


Datarate (Mbps) 10/100 Interface type RMII (Master and Slave Mode) Number of ports Single Rating Catalog Features Single supply, Low power, WoL, EEE, Cable diagnostics Supply voltage (V) 3.3 IO supply (Typ) (V) 1.8, 3.3 Operating temperature range (C) -40 to 85 Cable length (m) 150 open-in-new Find other Ethernet PHYs

Package | Pins | Size

WQFN (RMQ) 24 9 mm² 3 x 3 open-in-new Find other Ethernet PHYs


  • Ultra Small Form Factor 10/100 Mbps PHY : QFN 3 mm × 3 mm, 24 pin
  • Cable reach > 150 meters
  • Very low power consumption < 127 mW
  • Small system solution : integrated MDI and MAC termination resistors
  • Programmable energy saving modes
    • Active sleep
    • Deep power-down
    • Energy Efficient Ethernet (EEE) IEEE 802.3az
    • EEE support for legacy MAC
    • Wake-on-LAN (WoL)
  • Voltage mode line driver
  • MAC interface : RMII (master and slave mode)
  • Single 3.3 V power supply
  • I/O voltages: 1.8 V and 3.3 V
  • Repeater : RMII back-to-back mode in unmanaged mode
  • MDC/MDIO Interface for configuration and status
  • Fast link drop modes
  • Diagnostics features
    • TDR-based cable diagnostics for open, short
    • Built-in packet generator
    • Multiple loopbacks
  • Programmable Hardware interrupt pin
  • Operating temperature range: –40°C to 85°C
  • Compliant to IEEE 802.3 100BASE-TX and 10BASE-Te specification
open-in-new Find other Ethernet PHYs


The DP83825I is an ultra small form factor, very low power Ethernet Physical Layer transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX Ethernet protocols. It supports up to 150 meters reach over CAT5e cable. The DP83825I interfaces directly to twisted pair media via an external transformer. It interfaces to the MAC layer through Reduced MII (RMII) both in Master and Slave mode. It provide 50-MHz output clock in RMII Master Mode. This clock is synchronized to MDI derived clock to reduce the jitter in the system.

The DP83825I also supports Energy Efficient Ethernet, Wake-on-LAN and MAC isolation to further lower the system power consumption. Energy Efficient Mode can be enabled through register configuration for legacy MACs not supporting EEE signaling over MAC. DP83825I can operate in un-managed repeater mode. In this mode, DP83825I works as a repeater without register configuration. The DP83825I offers integrated cable diagnostic tools, built-in self-test and loopback capabilities for ease of development and debug.

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DP83826E ACTIVE Low latency 10/100-Mbps PHY with MII interface and enhanced mode This product supports lower and more deterministic latency, with an extended temperature range of -40°C to 105°C
DP83826I ACTIVE Low latency 10/100-Mbps PHY, MII interface and enhanced mode with an industrial temperature range This product supports lower and more deterministic latency, with an industrial temperature range of -40°C to 85°C

Technical documentation

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Type Title Date
* Data sheet DP83825I Low Power 10/100 Mbps Ethernet Physical Layer Transceiver datasheet (Rev. A) Aug. 26, 2019
Application note How to Pass IEEE Ethernet Compliance Tests Sep. 20, 2021
Application note How to Merge DP83825 On Linux Sitara AM335 Application Note (Rev. A) Aug. 31, 2021
Application note How Ethernet's Long Cable Reach Benefits Building Automation Jun. 29, 2020
Technical article SimpliPHY your Ethernet design, part 1: Ethernet PHY basics and selection process Mar. 11, 2020
Application note Solving Cable Faults Challenges with TI Ethernet PHYs Nov. 20, 2019
Application note How to Use Energy Efficient Ethernet (IEEE 802.3az) With Texas Instruments Oct. 07, 2019
Technical article Low power, big impact: Low-power Ethernet PHYs for building automation Feb. 21, 2019
Application note Selection and specification of crystals for Texas Instruments ethernet physical Feb. 06, 2019
User guide DP83825EVM User's Guide Dec. 13, 2018
Technical article Two ways to save power with low-power Ethernet Nov. 17, 2016
Technical article How Ethernet technology is shifting modern markets 40 years after its inception Jul. 27, 2015

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide

The DP83825EVM lets designers evaluate the industry’s smallest form-factor, 10BASE-Te/100BASE-TX Ethernet physical layer transceiver, the DP83825I PHY. This evaluation module (EVM) lets designers use one of two interfaces: a network interface through an RJ-45 connector and a MAC interface (...)

  • 150-m Cat5 cable reach
  • 100Base-TX, 10Base-Te
  • On-Board MSP430F5529 with USB-2-MDIO for register access
  • Supports interoperability testing, compliance testing and BER testing

Software development

Ethernet PHY Linux drivers & tools
ETHERNET-SW The Linux drivers for Texas Instruments' Ethernet physical layer (PHY) transceivers support communication through the serial management interface (MDC/MDIO) to configure and read PHY registers.

The USB-2-MDIO software lets you directly access the registers during debug and prototyping.  (...)

Design tools & simulation

SNLM226.ZIP (26 KB) - IBIS Model
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

Reference designs

EMC-compliant 10/100-Mbps Ethernet PHY reference design with IEEE802.3at Type-1 (≤ 12.95 W) PoE-PD
TIDA-010046 — This reference design provides a cost-optimized solution for 10 to 100 Mbps using the low-power Ethernet physical layer (PHY) DP83825 supporting 150-m reach over CAT5e cable which is beyond the standard Ethernet distance limitation of 100 m (328 feet). This design also demonstrates power (...)
document-generic Schematic

CAD/CAE symbols

Package Pins Download
WQFN (RMQ) 24 View options

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