The ADS8364 includes six, 16-bit, 250KHz ADCs (Analog to Digital Converters) with 6 fully differential input channels grouped into two pairs for high-speed simultaneous signal acquisition. Inputs to the sample-and-hold amplifiers are fully differential and are maintained differential to the input of the ADC. This provides excellent common-mode rejection of 80dB at 50KHz that is important in high-noise environments.
The ADS8364 offers a flexible high-speed parallel interface with a direct address mode, a cycle, and a FIFO mode. The output data for each channel is available as a 16-bit word.
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|Part number||Order||Resolution (Bits)||Sample rate (Max) (kSPS)||Number of input channels||Interface||Operating temperature range (C)||Package Group||Approx. price (US$)||Power consumption (Typ) (mW)||Package size: mm2:W x L (PKG)||Architecture||Input type||Multi-channel configuration||Reference mode||Features||Input range (Max) (V)||Input range (Min) (V)||Analog voltage AVDD (Min) (V)||Analog voltage AVDD (Max) (V)||Digital supply (Min) (V)||Digital supply (Max) (V)||INL (Max) (+/-LSB)||SNR (dB)||THD (Typ) (dB)||Rating|
||16||250||6||Parallel||-40 to 85||TQFP | 64||18.10 | 1ku||413.1||64TQFP: 144 mm2: 12 x 12 (TQFP | 64)||SAR||Pseudo-Differential||Simultaneous Sampling||
||16||250||6||Parallel||-40 to 85||TQFP | 64||16.25 | 1ku||190||64TQFP: 144 mm2: 12 x 12 (TQFP | 64)||SAR||Pseudo-Differential||Simultaneous Sampling||