SPRUJB3 User guide | 德州仪器 TI.com.cn

SPRUJB3C March 2024 – November 2025 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1

2.1.3 R5FSS Memory View

The device has one single R5F core in the MAIN domain, one single R5F core in the MCU domain, and one single core R5F (Device Manager) in the WKUP domain. The R5F is a native 32b processor, which means the R5F core itself can only generate transactions using 32b address. A dedicated RAT module is integrated for this single core R5F to allow the R5F software to remap the 32b R5F address into the common 36b SoC address.

In addition, the R5F core has its own TCM, which the R5F core can access with its TCM with a single R5F core cycle. Those TCM memories have two sets of address, one set address is used for the R5F core for a single cycle access to those TCM. The second set of address is used by other initiators outside this R5F subsystem to access those TCM. The R5F core shall always use the first set of address to access its TCM. If the R5F core utilizes the second set of address to those TCM, the R5F core will receives an exception, since those transactions will be routed to be terminated by sending them to the null end point.

While the SoC level address for TCM is fixed, the address used by the R5F to access to its own TCM can be remapped by software. By default, the device puts the R5F’s ATCM at address 0x0 and the BTCM address at 0x4101_0000.

The MCU R5F has one section of the region dedicated for peripheral access from address 0x0400_0000 to 0x07FF_FFFF. The MAIN R5F and WKUP R5F also have one section of their regions dedicated for peripheral access from address 0x2000_0000 to 0x2FFF_FFFF. These memory regions are treated as normal memory, which can’t be cached. The R5F accesses this memory region through a dedicated single-issue interface, and none of the transactions accessing this memory region can be remapped by using RAT module.

The R5F core accesses its own ATCM and BTCM memory directly, and there is no address remapping for those access. All the other access than ATCM, BTCM, and address range 0x0400_0000 to 0x07FF_FFFF from the MCU R5F core, and address range 0x2000_0000 to 0x2FFF_FFFF from the MAIN R5F and WKUP R5F cores go through RAT module, which could be remapped into different address to access the rest of the SoC using the common 36b SoC memory map.

See the R5FSS0 Memory Map, MCU_R5FSS0 Memory Map, and WKUP_R5FSS0 Memory Map.

The common SoC memory map assigns the WKUP R5F’s ATCM and BTCM to address 0x7800_0000 and 0x7810_0000, the MCU R5F’s ATCM and BTCM to address 0x7900_0000 and 0x7902_0000, and the MAIN R5F’s ATCM and BTCM to address 0x7840_0000 and 0x7850_0000. The R5F software can optionally reprogram the its internal ATCM and BTCM address to match the address assigned by the common SoC memory map as well. Regardless where the R5F puts its own ATCM and BTCM, the R5F accesses its own ATCM and BTCM directly without going through RAT.

ATCM is by default disabled at address 0x0. BTCM is by default enabled and the default address for BTCM is 0x4101_0000. The base address of MCU VIM is at 0x07FF_0000 and the base address for RAT configuration is at 0x07FE_0000. The base address of MAIN and WKUP VIMs is at 0x2FFF_0000, and the base address for RAT configuration is at 0x2FFE_0000.

All of the MCU R5F transactions can go through RAT for address re-mapping function except the transactions targeted to address range 0x0400_0000 to 0x07FF_FFFF and its own ATCM and BTCM. All of the MAIN and WKUP R5F transactions can go through RAT for address re-mapping function except the transactions targeted to address range 0x2000_0000 to 0x2FFF_FFFF and their own ATCM and BTCM. It is highly recommended only remap the R5F’s address range from 0x8000_0000 to 0xFFFF_FFFF to access the target region located at the common memory map between 0x8000_0000 and 0xFFFF_FFFF.

Figure 2-1 MAIN, MCU, and Device Manager R5F Memory Map View