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SPRUJB3C March 2024 – November 2025 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1

3.4 Interrupt Condition for Interconnect

Each CBASS crossbar IP may generate up to two interrupts:

default_err_intr: the intent of this interrupt is for debug purposes. Any illegal transactions will trigger this interrupt and the illegal transaction information is logged by CBASS IP.
default_exp: this interrupt is asserted whenever there is a firewall violation. Only the CBASS IP contains firewall module that can generate this interrupt.

The illegal transactions triggering default_err_intr can be caused by multiple reasons:

The transaction is sent to a memory region not implemented in CBASS
The target interface or target peripheral is in disabled state

When CBASS detects an illegal transaction, it terminates the transaction gracefully to avoid a system hang. In addition, the CBASS sends return status back to the initiator with error status. If this illegal transaction is a read transaction, the read data is returned with all zeros. If this illegal transaction is a write transaction, this write transaction is terminated and returns a write error back to initiator. The interrupt and illegal transaction logging can be found in the CBASS’s err_regs region.

For any transaction blocked by the firewall, the transaction is terminated gracefully and the initiator will receive error status for the blocked transaction. If this blocked transaction is read, the read data is returned with all zeros. If this blocked transaction is a write transaction, this write transaction is terminated and returns a write error back to the initiator. The default_exp interrupt and the blocked transaction information can be found in the glb_regs region.

Table 3-1 CBASS Interrupt

CBASS Name	default_err_intr supported	default_exp Interrupt supported
CBASS0	Yes	Yes
MCU_CBASS0	Yes	No
CBASS_INFRA1	Yes	Yes
CBASS_FW0	Yes	No
CBASS_DBG0	Yes	No
CBASS_IPCSS0	Yes	Yes
CBASS_CENTRAL2	Yes	Yes
CBASS_MCASP0	Yes	No
WKUP_CBASS0	Yes	Yes