Product details

VDS (V) 12 Configuration Dual Common Drain Rds(on) at VGS=4.5 V (max) (mΩ) 5.9 IDM - pulsed drain current (max) (A) 52 QG (typ) (nC) 8.4 QGD (typ) (nC) 1.9 QGS (typ) (nC) 2.2 VGS (V) 10 VGSTH (typ) (V) 0.95 ID - silicon limited at TC=25°C (A) 8 ID - package limited (A) 8 Logic level Yes Operating temperature range (°C) -55 to 150 Rating Catalog
VDS (V) 12 Configuration Dual Common Drain Rds(on) at VGS=4.5 V (max) (mΩ) 5.9 IDM - pulsed drain current (max) (A) 52 QG (typ) (nC) 8.4 QGD (typ) (nC) 1.9 QGS (typ) (nC) 2.2 VGS (V) 10 VGSTH (typ) (V) 0.95 ID - silicon limited at TC=25°C (A) 8 ID - package limited (A) 8 Logic level Yes Operating temperature range (°C) -55 to 150 Rating Catalog
PICOSTAR (YJE) 6 2.3976 mm² 1.11 x 2.16
  • Common Drain Configuration
  • Low-On Resistance
  • Small Footprint of 2.2 mm × 1.15 mm
  • Lead Free
  • RoHS Compliant
  • Halogen Free
  • Gate ESD Protection
  • Common Drain Configuration
  • Low-On Resistance
  • Small Footprint of 2.2 mm × 1.15 mm
  • Lead Free
  • RoHS Compliant
  • Halogen Free
  • Gate ESD Protection

This 12-V, 9.9-mΩ, 2.2-mm × 1.15-mm LGA Dual NexFET™ power MOSFET is designed to minimize resistance and gate charge in a small footprint. Its small footprint and common drain configuration make the device ideal for battery pack applications in small handheld devices.

This 12-V, 9.9-mΩ, 2.2-mm × 1.15-mm LGA Dual NexFET™ power MOSFET is designed to minimize resistance and gate charge in a small footprint. Its small footprint and common drain configuration make the device ideal for battery pack applications in small handheld devices.

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Technical documentation

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Type Title Date
* Data sheet CSD83325L 12-V Dual N-Channel NexFET™ Power MOSFET datasheet (Rev. B) PDF | HTML 16 Feb 2017
More literature Using MOSFET Safe Operating Area Curves in Your Design PDF | HTML 13 Mar 2023
More literature MOSFET Support and Training Tools (Rev. A) PDF | HTML 04 Nov 2022
More literature Solving Assembly Issues with Chip Scale Power MOSFETs PDF | HTML 21 Oct 2022
More literature Tips for Successfully Paralleling Power MOSFETs PDF | HTML 31 May 2022
More literature WCSP Handling Guide 07 Nov 2019
Technical article Understanding the benefits of “lead-free” power MOSFETs 08 Feb 2019
Design guide FemtoFET Surface Mount Guide (Rev. D) 07 Jul 2016
More literature Semiconductor and IC Package Thermal Metrics (Rev. C) PDF | HTML 19 Apr 2016
Technical article When to use load switches in place of discrete MOSFETs 03 Feb 2016
Technical article 48V systems: Driving power MOSFETs efficiently and robustly 08 Oct 2015

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation model

CSD83325L Unencrypted PSpice Model (Rev. B)

SLPM144B.ZIP (5 KB) - PSpice Model
Calculation tool

NONSYNC-BOOST-FET-LOSS-CALC — Power loss calculation tool for non-synchronous boost converter

MOSFET power loss calculator for non-synchronous boost converter
Calculation tool

SYNC-BUCK-FET-LOSS-CALC — MOSFET power loss calculator for synchronous buck converter applications

Quickly trade off size, cost and performance to select the optimal MOSFET based on application conditions.
Reference designs

PMP4496 — USB-C DRP Power Bank With Fast Charger Input Reference Design

PMP4496 is a power bank reference design with a single USB type C dual role port (DRP). It can perform as a SINK or SOURCE. Role is automatically determined according to the external device attached. Fast charger input is also supported to save more charging time.
Test report: PDF
Schematic: PDF
Reference designs

TIDA-00712 — Smartwatch Battery Management Solution Reference Design

This reference design is for smartwatch battery management solution (BMS). It is suitable for low-power wearable devices like smartwatch applications. The design includes an ultra-low current 1 cell Li-ion linear charger; a highly integrated Qi-compliant wireless power receiver; a (...)
Design guide: PDF
Schematic: PDF
Package Pins Download
PICOSTAR (YJE) 6 View options

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