A switching DC-DC converter is provided to achieve the intermediate voltage rail of 6 V that supplied the three LDOs. This is a basically mandatory choice since the high VIN / VOUT ratio makes any LDO unsuitable for the power conversion. Indeed the efficiency of any LDO could be simply calculated as VOUT / VIN that, in the worst case (maximum VIN) would lead to 5.25 V / 36 V ≈ 14%. The remaining 86% of the power consumption is dissipated by the LDO package: having indeed a maximum current of 200 mA would lead to 36 V × 200 mA × 86% = 6.2-W power dissipated on the LDO package that would simply and quickly blow up any reasonable package.

Starting with the input filter, it is widely known that conducted EMI are generated by the normal operation of switching circuits. Large discontinuous currents are generated by the power switches turn on and off very fast. In a buck topology, large discontinuous currents (high di/dt) are present at the input of the converter. The selected values for the input filter are shown in Figure 4-9.

For more details about how to design an input EMI filter, please refer to the application report, AN-2162 Simple Success With Conducted EMI From DC/DC Converters (SNVA489).

Figure 4-9 Input Filter Including Reverse Polarity Protection

The DC/DC buck converter has been designed to meet the following specifications:

• Input voltage: V_IN = 17 to 36 V, 24 V nominal
• Output voltage: 6 V @ 500 mA
• Switching frequency: 500 kHz nominal
• Output voltage ripple: 25 mV_PP max
• Efficiency: > 80% at full load
• Non-isolated topology

The TPS54040A is selected for the purpose: this is a buck converter with an integrated FET, 3.5 to 42-V input voltage, and 0.8 to 39-V output voltage at a 500-mA output current. Its frequency can be adjusted from 100 kHz to 2.5 MHz or can be synchronized with an external clock. It can also be enabled and disabled. These features make the TPS54040A a very good fit to the requirements/specifications listed above.

Note that the TPS54040A is pin-to-pin compatible with the TPS5401, which is a lower cost version of the TPS54040A with similar performance but a less accurate output voltage and enabled threshold.

Also note that the TPS54040A is pin-to-pin compatible also with the TPS54140A, TPS54240, TPS54340, and TPS54540: this widens the part selection and offers the possibility to modulate costs and power level (in case of future system upgrades).

Figure 4-10 Schematic of 24-V to 6-V DC-DC Buck Converter With TPS54040A

For a detailed explanation of the design process, refer to the TPS54040A datasheet or the TI Design TIDA-00180.

On a typical application the output voltage is set thanks to a simple resistor divider network. Equation 12 gives the value of the upper resistor according to the output voltage, the reference voltage (0.8 V for the TPS54040A) and the lower resistor (with R10 usually fixed to 10 kΩ).

Equation 12.

With V_OUT = 6 V and R10 = 10 kΩ, R7 yields 65 kΩ.

The tolerance of the 6-V output voltage will be 6 V ±4%. This assumes feedback resistors with a 1% tolerance and the internal bandgap tolerance from the TPS54040A of ±2%.

The switching frequency is set with R8 = 237 kΩ to 500 kHz.

On the TPS54040A schematics, some components are marked as do not populate (DNP). This is the case of the snubber network formed by R4 and C11. The snubber network is not needed with the TPS540040A design. A snubber network is a solution to reduce the ringing on the switch node and overshoot of the MOSFET if needed. For more details of other option, refer to the application note Ringing Reduction Techniques for NexFETTM High Performance MOSFETs (SLPA010) on how to use and calculate the snubber network.