CSD25211W1015

ACTIVE

Product details

VDS (V) -20 VGS (V) -6 Configuration Single Rds(on) max at VGS=4.5 V (mOhms) 33 Rds(on) max at VGS=2.5 V (mOhms) 44 Id peak (Max) (A) -9.5 Id max cont (A) -3.2 QG typ (nC) 3.4 QGD typ (nC) 0.2 QGS typ (nC) 1.1 VGSTH typ (V) -0.8 Package (mm) WLP 1.0x1.5
VDS (V) -20 VGS (V) -6 Configuration Single Rds(on) max at VGS=4.5 V (mOhms) 33 Rds(on) max at VGS=2.5 V (mOhms) 44 Id peak (Max) (A) -9.5 Id max cont (A) -3.2 QG typ (nC) 3.4 QGD typ (nC) 0.2 QGS typ (nC) 1.1 VGSTH typ (V) -0.8 Package (mm) WLP 1.0x1.5
DSBGA (YZC) 6 3 mm² 1.006 x 1.5
  • Ultra-Low On Resistance
  • Ultra-Low Qg and Qgd
  • Small Footprint 1.0 mm × 1.5 mm
  • Low Profile 0.62 mm Height
  • Pb Free
  • Gate-Source Voltage Clamp
  • Gate ESD Protection – 3 kV
  • RoHS Compliant
  • Halogen Free
  • Ultra-Low On Resistance
  • Ultra-Low Qg and Qgd
  • Small Footprint 1.0 mm × 1.5 mm
  • Low Profile 0.62 mm Height
  • Pb Free
  • Gate-Source Voltage Clamp
  • Gate ESD Protection – 3 kV
  • RoHS Compliant
  • Halogen Free

The device is designed to deliver the lowest on resistance and gate charge in the smallest outline possible with excellent thermal characteristics in an ultra-low profile.

The device is designed to deliver the lowest on resistance and gate charge in the smallest outline possible with excellent thermal characteristics in an ultra-low profile.

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Technical documentation

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Type Title Date
* Data sheet CSD25211W1015, P-Channel NexFET Power MOSFET datasheet (Rev. A) 16 Jan 2014
Application note Tips for Successfully Paralleling Power MOSFETs PDF | HTML 31 May 2022
More literature WCSP Handling Guide 07 Nov 2019
Application note AN-1112 DSBGA Wafer Level Chip Scale Package (Rev. AI) 14 Jun 2019
Technical article Understanding the benefits of “lead-free” power MOSFETs 08 Feb 2019
Application note Semiconductor and IC Package Thermal Metrics (Rev. C) PDF | HTML 19 Apr 2016
Technical article When to use load switches in place of discrete MOSFETs 03 Feb 2016
Technical article 48V systems: Driving power MOSFETs efficiently and robustly 08 Oct 2015

Design & development

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Simulation model

CSD25211W1015 Unencrypted PSpice Model (Rev. A) CSD25211W1015 Unencrypted PSpice Model (Rev. A)

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DSBGA (YZC) 6 View options

Ordering & quality

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  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

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