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CSD25211W1015

ACTIVE

-20-V, P channel NexFET™ power MOSFET, single WLP 1 mm x 1.5 mm, 33 mOhm, gate ESD protection

CSD25211W1015

ACTIVE

Product details

VDS (V) -20 VGS (V) -6 Type P-channel Configuration Single Rds(on) at VGS=4.5 V (max) (mΩ) 33 Rds(on) at VGS=2.5 V (max) (mΩ) 44 VGSTH typ (typ) (V) -0.8 QG (typ) (nC) 3.4 QGD (typ) (nC) 0.2 QGS (typ) (nC) 1.1 ID - silicon limited at TC=25°C (A) 3.2 Logic level Yes Rating Catalog Operating temperature range (°C) -55 to 150
VDS (V) -20 VGS (V) -6 Type P-channel Configuration Single Rds(on) at VGS=4.5 V (max) (mΩ) 33 Rds(on) at VGS=2.5 V (max) (mΩ) 44 VGSTH typ (typ) (V) -0.8 QG (typ) (nC) 3.4 QGD (typ) (nC) 0.2 QGS (typ) (nC) 1.1 ID - silicon limited at TC=25°C (A) 3.2 Logic level Yes Rating Catalog Operating temperature range (°C) -55 to 150
DSBGA (YZC) 6 2.1875 mm² 1.75 x 1.25
  • Ultra-low on resistance
  • Ultra-low Qg and Qgd
  • Small footprint 1.0 mm × 1.5 mm
  • Low profile 0.62 mm height
  • Pb Free
  • Gate-source voltage clamp
  • Gate ESD protection – 3 kV
  • RoHS compliant
  • Halogen free
  • Ultra-low on resistance
  • Ultra-low Qg and Qgd
  • Small footprint 1.0 mm × 1.5 mm
  • Low profile 0.62 mm height
  • Pb Free
  • Gate-source voltage clamp
  • Gate ESD protection – 3 kV
  • RoHS compliant
  • Halogen free

The device is designed to deliver the lowest on resistance and gate charge in the smallest outline possible with excellent thermal characteristics in an ultra-low profile.

The device is designed to deliver the lowest on resistance and gate charge in the smallest outline possible with excellent thermal characteristics in an ultra-low profile.

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet CSD25211W1015, P-Channel NexFET Power MOSFET datasheet (Rev. B) PDF | HTML 16 Sep 2022
Application brief Estimating Leakage Currents of Power MOSFETs PDF | HTML 31 Oct 2025
Application note MOSFET Support and Training Tools (Rev. G) PDF | HTML 27 Oct 2025
Application note Avoid Common Mistakes When Selecting And Designing With Power MOSFETs PDF | HTML 06 Nov 2024
Application note Semiconductor and IC Package Thermal Metrics (Rev. D) PDF | HTML 25 Mar 2024
Application note Using MOSFET Transient Thermal Impedance Curves In Your Design PDF | HTML 18 Dec 2023
Application note Solving Assembly Issues with Chip Scale Power MOSFETs PDF | HTML 14 Dec 2023
Application note Using MOSFET Safe Operating Area Curves in Your Design PDF | HTML 13 Mar 2023
Application brief Tips for Successfully Paralleling Power MOSFETs PDF | HTML 31 May 2022
More literature WCSP Handling Guide 07 Nov 2019
Application note AN-1112 DSBGA Wafer Level Chip Scale Package (Rev. AI) 14 Jun 2019

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Support software

LOAD-SWITCH-FET-LOSS-CALC Power Loss Calculation Tool for Load Switch

Quickly trade off size, cost and performance to select the optimal MOSFET based on application conditions.
Supported products & hardware

Supported products & hardware

Simulation model

CSD25211W1015 Unencrypted PSpice Model (Rev. A)

SLPM338A.ZIP (4 KB) - PSpice Model
Package Pins CAD symbols, footprints & 3D models
DSBGA (YZC) 6 Ultra Librarian

Ordering & quality

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Information included:
  • Fab location
  • Assembly location

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