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CSD25310Q2

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-20-V, P channel NexFET™ power MOSFET, single SON 2 mm x 2 mm, 23.9 mOhm

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Data sheet

CSD25310Q2

ACTIVE
Data sheet Order now

Product details

VDS (V) -20 VGS (V) -8 Configuration Single Rds(on) max at VGS=4.5 V (mOhms) 23.9 Rds(on) max at VGS=2.5 V (mOhms) 32.5 Rds(on) max at VGS=1.8 V (mOhms) 89 Id peak (Max) (A) -48 Id max cont (A) -9.6 QG typ (nC) 3.6 QGD typ (nC) 0.5 QGS typ (nC) 1.1 VGSTH typ (V) -0.85 Package (mm) SON 2x2 ID - silicon limited at Tc=25degC (A) 9.6 Logic level Yes
VDS (V) -20 VGS (V) -8 Configuration Single Rds(on) max at VGS=4.5 V (mOhms) 23.9 Rds(on) max at VGS=2.5 V (mOhms) 32.5 Rds(on) max at VGS=1.8 V (mOhms) 89 Id peak (Max) (A) -48 Id max cont (A) -9.6 QG typ (nC) 3.6 QGD typ (nC) 0.5 QGS typ (nC) 1.1 VGSTH typ (V) -0.85 Package (mm) SON 2x2 ID - silicon limited at Tc=25degC (A) 9.6 Logic level Yes
  • Ultra-Low Qg and Qgd
  • Low On Resistance
  • Low Thermal Resistance
  • Pb-Free
  • RoHS Compliant
  • Halogen Free
  • SON 2-mm × 2-mm Plastic Package
  • Ultra-Low Qg and Qgd
  • Low On Resistance
  • Low Thermal Resistance
  • Pb-Free
  • RoHS Compliant
  • Halogen Free
  • SON 2-mm × 2-mm Plastic Package

This 19.9 mΩ, –20 V P-Channel device is designed to deliver the lowest on resistance and gate charge in the smallest outline possible with excellent thermal characteristics in an ultra-low profile. Its low on resistance coupled with an extremely small footprint in a SON 2 mm × 2 mm plastic package make the device ideal for battery operated space constrained operations.

For all available packages, see the orderable addendum at the end of the data sheet.

This 19.9 mΩ, –20 V P-Channel device is designed to deliver the lowest on resistance and gate charge in the smallest outline possible with excellent thermal characteristics in an ultra-low profile. Its low on resistance coupled with an extremely small footprint in a SON 2 mm × 2 mm plastic package make the device ideal for battery operated space constrained operations.

For all available packages, see the orderable addendum at the end of the data sheet.
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Technical documentation

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Type Title Date
* Data sheet CSD25310Q2 20 V P-Channel NexFET Power MOSFETs datasheet (Rev. A) PDF | HTML 05 Jun 2014
Application note MOSFET Support and Training Tools (Rev. A) PDF | HTML 04 Nov 2022
Application note Tips for Successfully Paralleling Power MOSFETs PDF | HTML 31 May 2022
Technical article What type of ESD protection does your MOSFET include? 22 Jun 2020
Technical article Understanding the benefits of “lead-free” power MOSFETs 08 Feb 2019
Application note QFN and SON PCB Attachment (Rev. B) PDF | HTML 24 Aug 2018
Application note Semiconductor and IC Package Thermal Metrics (Rev. C) PDF | HTML 19 Apr 2016
Technical article When to use load switches in place of discrete MOSFETs 03 Feb 2016
Technical article 48V systems: Driving power MOSFETs efficiently and robustly 08 Oct 2015
Application note Ringing Reduction Techniques for NexFET High Performance MOSFETs 16 Nov 2011

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Support software

Power Loss Calculation Tool for Load Switch (Rev. A)

SLPC019A.ZIP (375 KB)
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Simulation model

CSD25310Q2 TINA-TI Spice Model

SLPM123.TSM (7 KB) - TINA-TI Spice Model
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Simulation model

CSD25310Q2 Unencrypted PSpice Model (Rev. B)

SLPM105B.ZIP (4 KB) - PSpice Model
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