Design Description

This circuit performs a ±12V isolated voltage sensing measurement using the ISO224 isolated amplifier, TLV9002 operational amplifier, and the ADS7142 SAR ADC. The ISO224 can measure single-ended signals of ±12V with a fixed gain of ⅓V/V and produces a ±4V isolated differential output voltage with an output common-mode voltage of VDD2 / 2. Channel 1 of the TLV9002 conditions the output of the ISO224 to fit the input range of the ADS7142, while channel 2 monitors the ISO224 fail-safe output. The ADS7142 is a dual-channel ADC with a full-scale input and reference voltage of AVDD which can range from 1.65V to 3.6V. For this cookbook circuit, the ADS7142 dual-channel input is used in a pseudo-differential configuration which allows for both positive and negative signals to be measured by the ISO224. This circuit is applicable to many high voltage industrial applications, such as Train Control and Management Systems, Analog Input Modules, and Inverter and Motor Control. The equations and explanation of component selection in this design can be customized based on system specifications and requirements.

Specifications

Design Notes

1. The ISO224 was selected due to the wide input range, flexible power configuration, and high accuracy.
2. The ADS7142 was selected due to very low power, high level of integration, flexible power configurations, and small size.
3. The TLV9002 operational amplifier was selected for the cost optimization, configuration options, and small size.
4. Select low impedance, low noise sources for AVDD, V_CM, and the pseudo-differential input to AINN which sets the common-mode voltage of the ADC.
5. Find the ADC full-scale range and common-mode specifications. This is discussed in component selection.
6. Select a COG capacitor for C_FILT to minimize distortion.
7. For best performance, consider using a 0.1% 20ppm/°C film resistor for R_FILT1,2 or better to minimize distortion.
8. Understanding and Calibrating the Offset and Gain for ADC Systems discusses methods for error analysis. Review the link for methods to minimize gain, offset, drift, and noise errors.
9. The TI Precision Labs - ADCs training video series discusses methods for selecting the charge bucket circuit R_FILT and C_FILT. These component values are dependent on the amplifier bandwidth, data converter sampling rate, and data converter design. The values shown here provide good settling and AC performance for the amplifier and data converter in this example. If the design is modified, a different RC filter must be selected. See Introduction to SAR ADC Front-End Component Selection for an explanation of how to select the RC filter for best settling and AC performance.

Component Selection

1. Select an isolated amplifier based on the input voltage range and determine the output common-mode voltage and output voltage range:

   The ISO224 power supplies can be 4.5V to 18V for the high-side power supply, and 4.5V to 5.5V for the low-side power supply. The ISO224 has a ±12V single-ended input range with a fixed gain of ⅓V/V, yielding a ±4V differential output at a common-mode voltage of VDD2 / 2, 2.5V for this example:

   $\frac{{\pm 12\mathrm{V}}_{\mathrm{I}\mathrm{N},\mathrm{S}\mathrm{i}\mathrm{n}\mathrm{g}\mathrm{l}\mathrm{e}-\mathrm{E}\mathrm{n}\mathrm{d}\mathrm{e}\mathrm{d}}}{3}=\pm {4\mathrm{V}}_{\mathrm{O}\mathrm{U}\mathrm{T},\mathrm{D}\mathrm{i}\mathrm{f}\mathrm{f}\mathrm{e}\mathrm{r}\mathrm{e}\mathrm{n}\mathrm{t}\mathrm{i}\mathrm{a}\mathrm{l}}\mathrm{ }\mathrm{a}\mathrm{t}\mathrm{ }2.5\mathrm{V}\left(\frac{{\mathrm{V}}_{\mathrm{D}\mathrm{D}2}}{2}\right)\mathrm{ }\mathrm{c}\mathrm{o}\mathrm{m}\mathrm{m}\mathrm{o}\mathrm{n}-\mathrm{m}\mathrm{o}\mathrm{d}\mathrm{e}$
2. Select an ADC with small size and low power:

   The ADS7142 is a small sized, low power, dual channel ADC that can be used in a pseudo-differential configuration. The maximum input range is set by the reference voltage and is equal to AVDD, 3.3V for this example:

   ${\mathrm{A}\mathrm{D}\mathrm{C}}_{\mathrm{F}\mathrm{u}\mathrm{l}\mathrm{l}-\mathrm{S}\mathrm{c}\mathrm{a}\mathrm{l}\mathrm{e}\mathrm{ }\mathrm{R}\mathrm{a}\mathrm{n}\mathrm{g}\mathrm{e}}=\mathrm{ }{\mathrm{V}}_{\mathrm{R}\mathrm{E}\mathrm{F}}=\mathrm{A}\mathrm{V}\mathrm{D}\mathrm{D}=3.3\mathrm{V}$

   Find the required ADC common-mode voltage for pseudo-differential measurements:

   ${\mathrm{V}}_{\mathrm{C}\mathrm{M}}=\frac{{\mathrm{V}}_{\mathrm{R}\mathrm{E}\mathrm{F}}}{2}=1.65\mathrm{V}$
3. Select an operational amplifier that can convert the ±4V differential, 2.5V common-mode output of the ISO224 to the 3.3V pseudo-differential, 1.65V common-mode input of the ADS7142. Additionally, selecting an operational amplifier with a second channel that can monitor the fail-safe output feature of the ISO224 is preferred.

   The TLV9002 is a 2 channel, rail-to-rail input and output amplifier optimized for cost sensitive and small size applications.

   Channel 1 is used to convert the ±4V differential, 2.5V common-mode output of the ISO224 to a 3.3V peak pseudo-differential output with a common-mode voltage of 1.65V. When R1 = R4 and R2 = R3, the transfer function is set by the following equation:

   ${\mathrm{V}}_{\mathrm{O}\mathrm{U}\mathrm{T}}={\mathrm{V}}_{\mathrm{O}\mathrm{U}\mathrm{T}\mathrm{P}}\left(\frac{{\mathrm{R}}_4}{{\mathrm{R}}_3}\right)+{\mathrm{V}}_{\mathrm{O}\mathrm{U}\mathrm{T}\mathrm{N}}\left(\frac{{\mathrm{R}}_1}{{\mathrm{R}}_2}\right)+{\mathrm{V}}_{\mathrm{C}\mathrm{M}}$

   The signal must be converted from ±4V to 3.3V, this means that the signal must be reduced by a factor of 3.3V / ±4V = 3.3V / 8V. Substituting V_CM with the previously calculated value of 1.65V and setting R2 and R3 to 10kΩ yields the following equations:

   $3.3\mathrm{V}=4\mathrm{V}\left(\frac{{\mathrm{R}}_4}{10\mathrm{k}\mathrm{\Omega }}\right)+1.65\mathrm{V}\mathrm{ }\mathrm{ }\mathrm{ }\mathrm{ }\mathrm{ }\mathrm{ }\mathrm{ }\mathrm{ }\mathrm{ }\mathrm{ }\mathrm{ }\mathrm{ }\mathrm{ }0\mathrm{V}=-4\mathrm{V}\left(\frac{{\mathrm{R}}_1}{10\mathrm{k}\mathrm{\Omega }}\right)+1.65\mathrm{V}$

   Solving for R1 and R4 yields values of 4.125kΩ.

   Additional information on this topic can be seen in the Interfacing a Differential-Output (Isolated) Amplifier to a Single-Ended Input ADC application brief.

   Channel 2 of the TLV9002 is used to monitor the fail-safe output feature of the ISO224. The ISO224 fail-safe output feature becomes active whenever the high-side power supply (VDD1) is missing independent of the input signal on the V_IN pin. The TLV9002 channel 2 output (VCOMP) is fed to a GPIO port on the system controller and goes high whenever the fail-safe output feature is active. For additional details, see the Fail-Safe Output Feature application note.

4. Select R_1FILT, R_2FILT, and C_FILT for settling of the input signal and sample rate of 140kSPS:

   Refine the R_FILT and C_FILT Values is a TI Precision Labs video showing the methodology for selecting R_FILT and C_FILT. The final value of 1.1kΩ and 330pF proved to settle to well below ½ of a least significant bit (LSB) within the acquisition window.

Transient ADC Input Settling Simulation

The following simulation shows the transient settling results with an acquisition time of 5.3μs. The 88μV of noise is well within the 0.5 × LSB limit of 403μV. See Refine the Rfilt and Cfilt Values for detailed theory on this subject.

Link to Key Files

TINA files for Isolated Design: SBAC226.

Design Featured Devices