AM3871

활성

Sitara 프로세서: Arm Cortex-A8, 이더넷

제품 상세 정보

CPU 1 Arm Cortex-A8 Frequency (MHz) 1000 Protocols Ethernet PCIe 1 PCIe Gen 2 Operating system Linux, RTOS Security Cryptographic acceleration Rating Catalog Operating temperature range (°C) 0 to 90
CPU 1 Arm Cortex-A8 Frequency (MHz) 1000 Protocols Ethernet PCIe 1 PCIe Gen 2 Operating system Linux, RTOS Security Cryptographic acceleration Rating Catalog Operating temperature range (°C) 0 to 90
FCBGA (CYE) 684 529 mm² 23 x 23
  • High-Performance Sitara™ ARM® Processors
    • ARM Cortex®-A8 Core
      • ARMv7 Architecture
        • In-Order, Dual-Issue, Superscalar Processor Core
        • Neon™ Multimedia Architecture
        • Supports Integer and Floating Point
        • Jazelle® RCT Execution Environment
    • ARM Cortex-A8 Memory Architecture
      • 32KB of Instruction and Data Caches
      • 512KB of L2 Cache
      • 64KB of RAM, 48KB of Boot ROM
    • 128KB of On-Chip Memory Controller (OCMC) RAM
    • Imaging Subsystem (ISS)
      • Camera Sensor Connection
        • Parallel Connection for Raw (up to 16-Bit) and BT.656 or BT.1120 (8- and 16-Bit)
      • Image Sensor Interface (ISIF) for Handling Image and Video Data From the Camera Sensor
      • Resizer
        • Resizing Image and Video From 1/16x to 8x
        • Generating Two Different Resizing Outputs Concurrently
    • Media Controller
      • Controls the HDVPSS and ISS
    • SGX530 3D Graphics Engine
      • Delivers up to 25 MPoly/sec
      • Universal Scalable Shader Engine (USSE™)
      • Direct3D Mobile, OpenGLES 1.1 and 2.0, OpenVG 1.0, OpenMax API Support
      • Advanced Geometry DMA-Driven Operation
      • Programmable HQ Image Anti-Aliasing
    • Endianness
      • ARM Instructions and Data – Little Endian
    • HD Video Processing Subsystem (HDVPSS)
      • Two 165-MHz, 2-channel HD Video Capture Modules
        • One 16- or 24-Bit Input or Dual 8-Bit SD Input Channels
        • One 8-, 16-, or 24-Bit Input and One 8-Bit Only Input Channels
      • Two 165-MHz HD Video Display Outputs
        • One 16-, 24-, or 30-Bit Output and One 16- or 24-Bit Output
      • Composite or S-Video Analog Output
      • Macrovision® Support Available
      • Digital HDMI 1.3 Transmitter With Integrated PHY
      • Advanced Video Processing Features Such as Scan, Format, Rate Conversion
      • Three Graphics Layers and Compositors
    • Dual 32-Bit DDR2/DDR3 SDRAM Interfaces
      • Supports up to DDR2-800 and DDR3-1066
      • Up to Eight x 8 Devices Comprise 2GB of the Total Address Space
      • Dynamic Memory Manager (DMM)
        • Programmable Multizone Memory Mapping and Interleaving
        • Enables Efficient 2D Block Accesses
        • Supports Tiled Objects in 0°, 90°, 180°, or 270° Orientation and Mirroring
        • Optimizes Interlaced Accesses
    • General-Purpose Memory Controller (GPMC)
      • 8- or 16-Bit Multiplexed Address and Data Bus
      • 512MB of Address Space Divided Among up to 8 Chip Selects
      • Glueless Interface to NOR Flash, NAND Flash (BCH/Hamming Error Code Detection), SRAM and Pseudo-SRAM
      • Error Locator Module (ELM) Outside of GPMC to Provide up to 16-Bit or 512-Byte Hardware ECC for NAND
      • Flexible Asynchronous Protocol Control for Interface to FPGA, CPLD, ASICs, and so Forth
    • Enhanced Direct Memory Access (EDMA) Controller
      • Four Transfer Controllers
      • 64 Independent DMA Channels and 8 Independent QDMA Channels
    • Dual-Port Ethernet (10/100/1000 Mbps) With Optional Switch
      • IEEE 802.3 Compliant (3.3-V I/O Only)
      • MII/RMII/GMII/RGMII Media Independent Interfaces
      • Management Data I/O (MDIO) Module
      • Reset Isolation
      • IEEE 1588 Time-Stamping and Industrial Ethernet Protocols
    • Dual USB 2.0 Ports With Integrated PHYs
      • USB2.0 High- and Full-Speed Clients
      • USB2.0 High-, Full-, and Low-Speed Hosts, or OTG
      • Supports End-point 0–15
    • One PCI-Express 2.0 Port With Integrated PHY
      • Single Port With One Lane at 5.0 GT/s
      • Configurable as Root Complex or End-point
    • Eight 32-Bit General-Purpose Timers (Timer1–Timer8)
    • One System Watchdog Timer (WDT0)
    • Six Configurable UART/IrDA/CIR Modules
      • UART0 With Modem Control Signals
      • Supports up to 3.6864 Mbps UART0/1/2
      • Supports up to 12 Mbps UART3/4/5
      • SIR, MIR, FIR (4.0 MBAUD), and CIR
    • Four Serial Peripheral Interfaces (SPIs) (up to
      48 MHz)
      • Each With Four Chip Selects
    • Three MMC/SD/SDIO Serial Interfaces (up to
      48 MHz)
      • Three Supporting up to 1-, 4-, or 8-Bit Modes
    • Dual Controller Area Network (DCAN) Modules
      • CAN Version 2 Part A, B
    • Four Inter-Integrated Circuit (I2C Bus) Ports
    • Six Multichannel Audio Serial Ports (McASPs)
      • Dual 10 Serializer Transmit and Receive Ports
      • Quad Four Serializer Transmit and Receive Ports
      • DIT-Capable For S/PDIF (All Ports)
    • Multichannel Buffered Serial Port (McBSP)
      • Transmit and Receive Clocks up to 48 MHz
      • Two Clock Zones and Two Serial Data Pins
      • Supports TDM, I2S, and Similar Formats
    • Serial ATA (SATA) 3.0 Gbps Controller With Integrated PHY
      • Direct Interface to One Hard Disk Drive
      • Hardware-Assisted Native Command Queuing (NCQ) from up to 32 Entries
      • Supports Port Multiplier and Command-Based Switching
    • Real-Time Clock (RTC)
      • One-Time or Periodic Interrupt Generation
    • Up to 128 General-Purpose I/O (GPIO) Pins
    • One Spin Lock Module With up to 128 Hardware Semaphores
    • One Mailbox Module With 12 Mailboxes
    • On-Chip ARM ROM Bootloader (RBL)
    • Power, Reset, and Clock Management
      • Multiple Independent Core Power Domains
      • Multiple Independent Core Voltage Domains
      • Support for Three Operating Points (OPP100, OPP120, OPP166) per Voltage Domain
      • Clock Enable and Disable Control for Subsystems and Peripherals
    • 32KB of Embedded Trace Buffer (ETB) and
      5-Pin Trace Interface for Debug
    • IEEE 1149.1 (JTAG) Compatible
    • 684-Pin Pb-Free BGA Package (CYE Suffix),
      0.8-mm Ball Pitch With Via Channel Technology to Reduce PCB Cost
    • 45-nm CMOS Technology
    • 1.8- and 3.3-V Dual Voltage Buffers for General I/O

    All trademarks are the property of their respective owners.

    • High-Performance Sitara™ ARM® Processors
      • ARM Cortex®-A8 Core
        • ARMv7 Architecture
          • In-Order, Dual-Issue, Superscalar Processor Core
          • Neon™ Multimedia Architecture
          • Supports Integer and Floating Point
          • Jazelle® RCT Execution Environment
      • ARM Cortex-A8 Memory Architecture
        • 32KB of Instruction and Data Caches
        • 512KB of L2 Cache
        • 64KB of RAM, 48KB of Boot ROM
      • 128KB of On-Chip Memory Controller (OCMC) RAM
      • Imaging Subsystem (ISS)
        • Camera Sensor Connection
          • Parallel Connection for Raw (up to 16-Bit) and BT.656 or BT.1120 (8- and 16-Bit)
        • Image Sensor Interface (ISIF) for Handling Image and Video Data From the Camera Sensor
        • Resizer
          • Resizing Image and Video From 1/16x to 8x
          • Generating Two Different Resizing Outputs Concurrently
      • Media Controller
        • Controls the HDVPSS and ISS
      • SGX530 3D Graphics Engine
        • Delivers up to 25 MPoly/sec
        • Universal Scalable Shader Engine (USSE™)
        • Direct3D Mobile, OpenGLES 1.1 and 2.0, OpenVG 1.0, OpenMax API Support
        • Advanced Geometry DMA-Driven Operation
        • Programmable HQ Image Anti-Aliasing
      • Endianness
        • ARM Instructions and Data – Little Endian
      • HD Video Processing Subsystem (HDVPSS)
        • Two 165-MHz, 2-channel HD Video Capture Modules
          • One 16- or 24-Bit Input or Dual 8-Bit SD Input Channels
          • One 8-, 16-, or 24-Bit Input and One 8-Bit Only Input Channels
        • Two 165-MHz HD Video Display Outputs
          • One 16-, 24-, or 30-Bit Output and One 16- or 24-Bit Output
        • Composite or S-Video Analog Output
        • Macrovision® Support Available
        • Digital HDMI 1.3 Transmitter With Integrated PHY
        • Advanced Video Processing Features Such as Scan, Format, Rate Conversion
        • Three Graphics Layers and Compositors
      • Dual 32-Bit DDR2/DDR3 SDRAM Interfaces
        • Supports up to DDR2-800 and DDR3-1066
        • Up to Eight x 8 Devices Comprise 2GB of the Total Address Space
        • Dynamic Memory Manager (DMM)
          • Programmable Multizone Memory Mapping and Interleaving
          • Enables Efficient 2D Block Accesses
          • Supports Tiled Objects in 0°, 90°, 180°, or 270° Orientation and Mirroring
          • Optimizes Interlaced Accesses
      • General-Purpose Memory Controller (GPMC)
        • 8- or 16-Bit Multiplexed Address and Data Bus
        • 512MB of Address Space Divided Among up to 8 Chip Selects
        • Glueless Interface to NOR Flash, NAND Flash (BCH/Hamming Error Code Detection), SRAM and Pseudo-SRAM
        • Error Locator Module (ELM) Outside of GPMC to Provide up to 16-Bit or 512-Byte Hardware ECC for NAND
        • Flexible Asynchronous Protocol Control for Interface to FPGA, CPLD, ASICs, and so Forth
      • Enhanced Direct Memory Access (EDMA) Controller
        • Four Transfer Controllers
        • 64 Independent DMA Channels and 8 Independent QDMA Channels
      • Dual-Port Ethernet (10/100/1000 Mbps) With Optional Switch
        • IEEE 802.3 Compliant (3.3-V I/O Only)
        • MII/RMII/GMII/RGMII Media Independent Interfaces
        • Management Data I/O (MDIO) Module
        • Reset Isolation
        • IEEE 1588 Time-Stamping and Industrial Ethernet Protocols
      • Dual USB 2.0 Ports With Integrated PHYs
        • USB2.0 High- and Full-Speed Clients
        • USB2.0 High-, Full-, and Low-Speed Hosts, or OTG
        • Supports End-point 0–15
      • One PCI-Express 2.0 Port With Integrated PHY
        • Single Port With One Lane at 5.0 GT/s
        • Configurable as Root Complex or End-point
      • Eight 32-Bit General-Purpose Timers (Timer1–Timer8)
      • One System Watchdog Timer (WDT0)
      • Six Configurable UART/IrDA/CIR Modules
        • UART0 With Modem Control Signals
        • Supports up to 3.6864 Mbps UART0/1/2
        • Supports up to 12 Mbps UART3/4/5
        • SIR, MIR, FIR (4.0 MBAUD), and CIR
      • Four Serial Peripheral Interfaces (SPIs) (up to
        48 MHz)
        • Each With Four Chip Selects
      • Three MMC/SD/SDIO Serial Interfaces (up to
        48 MHz)
        • Three Supporting up to 1-, 4-, or 8-Bit Modes
      • Dual Controller Area Network (DCAN) Modules
        • CAN Version 2 Part A, B
      • Four Inter-Integrated Circuit (I2C Bus) Ports
      • Six Multichannel Audio Serial Ports (McASPs)
        • Dual 10 Serializer Transmit and Receive Ports
        • Quad Four Serializer Transmit and Receive Ports
        • DIT-Capable For S/PDIF (All Ports)
      • Multichannel Buffered Serial Port (McBSP)
        • Transmit and Receive Clocks up to 48 MHz
        • Two Clock Zones and Two Serial Data Pins
        • Supports TDM, I2S, and Similar Formats
      • Serial ATA (SATA) 3.0 Gbps Controller With Integrated PHY
        • Direct Interface to One Hard Disk Drive
        • Hardware-Assisted Native Command Queuing (NCQ) from up to 32 Entries
        • Supports Port Multiplier and Command-Based Switching
      • Real-Time Clock (RTC)
        • One-Time or Periodic Interrupt Generation
      • Up to 128 General-Purpose I/O (GPIO) Pins
      • One Spin Lock Module With up to 128 Hardware Semaphores
      • One Mailbox Module With 12 Mailboxes
      • On-Chip ARM ROM Bootloader (RBL)
      • Power, Reset, and Clock Management
        • Multiple Independent Core Power Domains
        • Multiple Independent Core Voltage Domains
        • Support for Three Operating Points (OPP100, OPP120, OPP166) per Voltage Domain
        • Clock Enable and Disable Control for Subsystems and Peripherals
      • 32KB of Embedded Trace Buffer (ETB) and
        5-Pin Trace Interface for Debug
      • IEEE 1149.1 (JTAG) Compatible
      • 684-Pin Pb-Free BGA Package (CYE Suffix),
        0.8-mm Ball Pitch With Via Channel Technology to Reduce PCB Cost
      • 45-nm CMOS Technology
      • 1.8- and 3.3-V Dual Voltage Buffers for General I/O

      All trademarks are the property of their respective owners.

      AM387x Sitara ARM processors are highly integrated, programmable platforms that leverage the Sitara processor technology.

      The device enables Original-Equipment Manufacturers (OEMs) and Original-Design Manufacturers (ODMs) to quickly bring to market devices featuring robust operating systems support, rich user interfaces, and high processing performance through the maximum flexibility of a fully integrated mixed processor solution. The device also combines programmable ARM processing with a highly integrated peripheral set.

      The AM387x Sitara ARM processors also present OEMs and ODMs with new levels of processor scalability and software reuse. An OEM or ODM who used the AM387x processors in a design and can make a similar product with added features could scale up to the pin-compatible and software-compatible TMS320DM814x processors from TI. The TMS320DM814x DaVinci video processors add a powerful C674x core DSP along with a video encoder and decoder to the hardware on the AM387x. Additionally, OEMs or ODMs that have used the AM387x or DM814x processors and find a need for a faster ARM and/or DSP core performance could scale up to the software-compatible AM389x or TMS320DM816x devices with higher core speeds.

      Programmability is provided by an ARM Cortex-A8 RISC CPU with Neon extension. The ARM processor lets developers keep control functions separate from algorithms programmed on coprocessors, thus reducing the complexity of the system software. The ARM Cortex-A8 32-bit RISC core with Neon floating-point extension includes: 32KB of instruction cache; 32KB of data cache; 512KB of L2 cache; 48KB of boot ROM; and 64KB of RAM.

      The AM387x Sitara ARM processors also include an SGX530 3D graphics engine to off-load many graphics processing tasks from the ARM core, making more ARM MIPS available for common processing tasks on algorithms. Additionally, the AM387x processor has a complete set of development tools for the ARM which include C compilers and a Microsoft Windows debugger interface for visibility into source code execution.

      AM387x Sitara ARM processors are highly integrated, programmable platforms that leverage the Sitara processor technology.

      The device enables Original-Equipment Manufacturers (OEMs) and Original-Design Manufacturers (ODMs) to quickly bring to market devices featuring robust operating systems support, rich user interfaces, and high processing performance through the maximum flexibility of a fully integrated mixed processor solution. The device also combines programmable ARM processing with a highly integrated peripheral set.

      The AM387x Sitara ARM processors also present OEMs and ODMs with new levels of processor scalability and software reuse. An OEM or ODM who used the AM387x processors in a design and can make a similar product with added features could scale up to the pin-compatible and software-compatible TMS320DM814x processors from TI. The TMS320DM814x DaVinci video processors add a powerful C674x core DSP along with a video encoder and decoder to the hardware on the AM387x. Additionally, OEMs or ODMs that have used the AM387x or DM814x processors and find a need for a faster ARM and/or DSP core performance could scale up to the software-compatible AM389x or TMS320DM816x devices with higher core speeds.

      Programmability is provided by an ARM Cortex-A8 RISC CPU with Neon extension. The ARM processor lets developers keep control functions separate from algorithms programmed on coprocessors, thus reducing the complexity of the system software. The ARM Cortex-A8 32-bit RISC core with Neon floating-point extension includes: 32KB of instruction cache; 32KB of data cache; 512KB of L2 cache; 48KB of boot ROM; and 64KB of RAM.

      The AM387x Sitara ARM processors also include an SGX530 3D graphics engine to off-load many graphics processing tasks from the ARM core, making more ARM MIPS available for common processing tasks on algorithms. Additionally, the AM387x processor has a complete set of development tools for the ARM which include C compilers and a Microsoft Windows debugger interface for visibility into source code execution.

      다운로드 스크립트와 함께 비디오 보기 비디오

      관심 가지실만한 유사 제품

      open-in-new 대안 비교
      비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀
      AM3874 활성 Sitara 프로세서: Arm Cortex-A8, HDMI, 3D 그래픽 This device adds display capability in a software and pin compatible package

      기술 자료

      star =TI에서 선정한 이 제품의 인기 문서
      검색된 결과가 없습니다. 검색어를 지우고 다시 시도하세요.
      7개 모두 보기
      상위 문서 유형 직함 형식 옵션 날짜
      * Data sheet AM387x Sitara™ARM® Processors datasheet (Rev. D) PDF | HTML 2016/01/05
      * Errata AM387x Sitara ARM Microprocessors (MPUs) Errata (Silicon Revisions 3.0, 2.1) (Rev. C) 2013/04/15
      Application note High-Speed Interface Layout Guidelines (Rev. J) PDF | HTML 2023/02/24
      More literature From Start to Finish: A Product Development Roadmap for Sitara™ Processors 2020/12/16
      User guide How-To and Troubleshooting Guide for PRU-ICSS PROFIBUS 2018/09/24
      User guide AM387x Sitara ARM Microprocessors (MPUs) Technical Reference Manual (Rev. E) 2015/07/03
      Application note Canny Edge Detection Implementation on TMS320C64x/64x+ Using VLIB 2009/11/25

      설계 및 개발

      추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

      디버그 프로브

      TMDSEMU200-U — XDS200 USB 디버그 프로브

      XDS200은 TI 임베디드 장치를 디버깅하는 데 사용되는 디버그 프로브(에뮬레이터)입니다. 대부분의 장치의 경우 더욱 저렴한 신형 XDS110(www.ti.com/tool/TMDSEMU110-U)을 사용하실 것을 권장합니다. XDS200은 단일 포드에서 다양한 표준(IEEE1149.1, IEEE1149.7, SWD)을 지원합니다. 모든 XDS 디버그 프로브는 ETB(임베디드 트레이스 버퍼)가 포함되어 있는 모든 Arm® 및 DSP 프로세서에서 코어 및 시스템 트레이스를 지원합니다.

      XDS200은 TI 20핀 커넥터(TI 14핀, (...)

      TI.com에서 구매할 수 없음
      디버그 프로브

      TMDSEMU560V2STM-U — XDS560v2 시스템 추적 USB 디버그 프로브

      XDS560v2는 디버그 프로브의 XDS560™ 제품군 중 최고의 성능을 가진 제품으로, 기존의 JTAG 표준(IEEE1149.1)과 cJTAG(IEEE1149.7)를 모두 지원합니다. SWD(직렬 와이어 디버그)는 지원하지 않습니다.

      모든 XDS 디버그 프로브는 ETB(Embedded Trace Buffer)를 특징으로 하는 모든 ARM 및 DSP 프로세서에서 코어 및 시스템 추적을 지원합니다. 핀을 통한 추적의 경우 XDS560v2 PRO TRACE가 필요합니다.

      XDS560v2는 MIPI HSPT 60핀 커넥터(TI 14핀, (...)

      TI.com에서 구매할 수 없음
      디버그 프로브

      TMDSEMU560V2STM-UE — XDS560v2 시스템 추적 USB 및 이더넷 디버그 프로브

      The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

      All XDS debug probes support Core and System Trace in all ARM and DSP processors that (...)

      TI.com에서 구매할 수 없음
      소프트웨어 개발 키트(SDK)

      LINUXEZSDK-SITARA — Sitara™ 프로세서용 EZSDK(Linux EZ 소프트웨어 개발 키트)

      SITARA LINUX SDK

      Linux Software Development Kits (SDK) provide Sitara™ developers with an easy set up and quick out-of-box experience that is specific to and highlights the features of TI's ARM processors. Launching demos, benchmarks and applications is a snap with the included graphical user (...)

      드라이버 또는 라이브러리

      WIND-3P-VXWORKS-LINUX-OS — Wind River 프로세서 VxWorks 및 Linux 운영 체제

      Wind River is a global leader in delivering software for the Internet of Things (IoT). The company’s technology has been powering the safest, most secure devices in the world since 1981 and today is found in more than 2 billion products. Wind River offers a comprehensive edge-to-cloud product (...)
      IDE, 구성, 컴파일러 또는 디버거

      CCSTUDIO Code Composer Studio integrated development environment (IDE)

      Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize embedded applications. Code Composer Studio is available across Windows®, Linux® and macOS® platforms.

      (...)

      지원되는 제품 및 하드웨어

      지원되는 제품 및 하드웨어

      시작 다운로드 옵션
      운영 체제(OS)

      GHS-3P-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS

      The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
      운영 체제(OS)

      MG-3P-NUCLEUS-RTOS — Mentor Graphics Nucleus RTOS

      Software driven power management is crucial for battery operated or low power budget embedded systems. Embedded developers can now take advantage of the latest power saving features in popular TI devices with the built-in Power Management Framework in the Nucleus RTOS. Developers specify (...)
      운영 체제(OS)

      QNX-3P-NEUTRINO-RTOS — QNX Neutrino RTOS

      QNX Neutrino® RTOS(실시간 운영 체제)는 자동차, 의료, 운송, 군사 및 산업용 임베디드 시스템을 위한 차세대 제품을 지원하도록 설계된 모든 기능을 갖춘 견고한 RTOS입니다. 마이크로커널 설계 및 모듈식 아키텍처를 통해 고객은 낮은 총 소유 비용으로 고도로 최적화되고 안정적인 시스템을 만들 수 있습니다.
      소프트웨어 프로그래밍 도구

      UNIFLASH UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

      UniFlash is a software tool for programming on-chip flash on TI microcontrollers and wireless connectivity devices and on-board flash for TI processors. UniFlash provides both graphical and command-line interfaces.

      UniFlash can be run from the cloud on the TI Developer Zone or downloaded and used (...)

      지원되는 제품 및 하드웨어

      지원되는 제품 및 하드웨어

      시작 다운로드 옵션
      시뮬레이션 모델

      AM387x CYE BSDL Model

      SPRM551.ZIP (21 KB) - BSDL Model
      계산 툴

      CLOCKTREETOOL — Sitara, 오토모티브, 비전 분석 및 디지털 신호 프로세서용 클록 트리 툴

      The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:
      • Visualize the device clock tree
      • Interact with clock tree (...)
      사용 설명서: PDF
      패키지 CAD 기호, 풋프린트 및 3D 모델
      FCBGA (CYE) 684 Ultra Librarian

      주문 및 품질

      포함된 정보:
      • RoHS
      • REACH
      • 디바이스 마킹
      • 납 마감/볼 재질
      • MSL 등급/피크 리플로우
      • MTBF/FIT 예측
      • 물질 성분
      • 인증 요약
      • 지속적인 신뢰성 모니터링
      포함된 정보:
      • 팹 위치
      • 조립 위치

      지원 및 교육

      TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

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