TDA2SX

ACTIVO

Procesador SoC con aceleración de gráficos, visión y video con todas las funciones para aplicaciones

Detalles del producto

CPU 2 Arm Cortex-A15 Frequency (MHz) 1176 Coprocessors 4 Arm Cortex-M4 Graphics acceleration 1 2D, 2 3D Display type 1 HDMI, 3 LCD Protocols Ethernet PCIe 2 PCIe Gen 3 Hardware accelerators Embedded vision engines, Image video accelerator Features Vision Analytics Operating system Android, Linux, RTOS Security Cryptographic acceleration, Device attestation & anti-counterfeit, Hardware-enforced isolation, Secure boot, Secure debug, Secure storage, Software IP protection Rating Automotive Operating temperature range (°C) -40 to 125 Edge AI enabled No
CPU 2 Arm Cortex-A15 Frequency (MHz) 1176 Coprocessors 4 Arm Cortex-M4 Graphics acceleration 1 2D, 2 3D Display type 1 HDMI, 3 LCD Protocols Ethernet PCIe 2 PCIe Gen 3 Hardware accelerators Embedded vision engines, Image video accelerator Features Vision Analytics Operating system Android, Linux, RTOS Security Cryptographic acceleration, Device attestation & anti-counterfeit, Hardware-enforced isolation, Secure boot, Secure debug, Secure storage, Software IP protection Rating Automotive Operating temperature range (°C) -40 to 125 Edge AI enabled No
FCBGA (ABC) 760 529 mm² (23 mm × 23 mm)
  • Architecture designed for ADAS applications
  • Video, image, and gaphics processing support
    • Full-HD video (1920 × 1080p, 60 fps)
    • Multiple video input and video output
  • Dual Arm® Cortex®-A15 microprocessor subsystem
  • Up to two C66x floating-point VLIW DSP
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 × 16-Bit fixed-point multiplies per cycle
  • Up to 2.5MB of on-chip L3 RAM
  • Level 3 (L3) and level 4 (L4) interconnects
  • Two DDR2/DDR3/DDR3L memory interface (EMIF) modules
    • Supports up to DDR2-800 and DDR3-1066
    • Up to 2GB supported per EMIF
  • Dual Arm® Cortex®-M4 Image Orocessing Units (IPU)
  • Vision acceleration pac
    • Up to four Embedded Vision Engines (EVEs)
  • IVA-HD subsystem
  • Display subsystem
    • Display controller with DMA engine and up to three pipelines
    • HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
  • 2D-graphics accelerator (BB2D) subsystem
    • Vivante® GC320 core
  • Video Processing Engine (VPE)
  • Dual-core PowerVR® SGX544 3D GPU
  • Three Video Input Port (VIP) modules
    • Support for up to 10 multiplexed input ports
  • General-Purpose Memory Controller (GPMC)
  • 2-port gigabit ethernet (GMAC)
  • Enhanced Direct Memory Access (EDMA) controller
  • Dual Controller Area Network (DCAN) modules
    • CAN 2.0B protocol
  • PCI-Express® 3.0 port with integrated PHY
    • One 2-lane gen2-compliant port
    • or two 1-lane gen2-compliant ports
  • Sixteen 32-bit general-purpose timers
  • 32-bit MPU watchdog timer
  • Ten configurable UART/IrDA/CIR modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI interface
  • Five Inter-Integrated Circuit (I2C) ports
  • SATA interface
  • Eight Multichannel Audio Serial Port (McASP) modules
  • SuperSpeed USB 3.0 dual-role device
  • Three high-speed USB 2.0 dual-role devices
  • Four Multimedia Card/Secure Digital/Secure Digital Input Output interfaces (MMC®/SD®/SDIO)
  • Up to 247 General-Purpose I/O (GPIO) pins
  • Real-Time Clock SubSystem (RTCSS)
  • Device security features
    • Hardware crypto accelerators and DMA
    • Firewalls
    • JTAG® lock
    • Secure keys
    • Secure ROM and boot
  • Power, Reset, and Clock Management (PRSM)
  • On-chip debug with CTools technology
  • Automotive AEC-Q100 qualified
  • 28-nm CMOS technology
  • 23 mm × 23 mm, 0.8-mm pitch, 760-Pin BGA (ABC)
  • Architecture designed for ADAS applications
  • Video, image, and gaphics processing support
    • Full-HD video (1920 × 1080p, 60 fps)
    • Multiple video input and video output
  • Dual Arm® Cortex®-A15 microprocessor subsystem
  • Up to two C66x floating-point VLIW DSP
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 × 16-Bit fixed-point multiplies per cycle
  • Up to 2.5MB of on-chip L3 RAM
  • Level 3 (L3) and level 4 (L4) interconnects
  • Two DDR2/DDR3/DDR3L memory interface (EMIF) modules
    • Supports up to DDR2-800 and DDR3-1066
    • Up to 2GB supported per EMIF
  • Dual Arm® Cortex®-M4 Image Orocessing Units (IPU)
  • Vision acceleration pac
    • Up to four Embedded Vision Engines (EVEs)
  • IVA-HD subsystem
  • Display subsystem
    • Display controller with DMA engine and up to three pipelines
    • HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
  • 2D-graphics accelerator (BB2D) subsystem
    • Vivante® GC320 core
  • Video Processing Engine (VPE)
  • Dual-core PowerVR® SGX544 3D GPU
  • Three Video Input Port (VIP) modules
    • Support for up to 10 multiplexed input ports
  • General-Purpose Memory Controller (GPMC)
  • 2-port gigabit ethernet (GMAC)
  • Enhanced Direct Memory Access (EDMA) controller
  • Dual Controller Area Network (DCAN) modules
    • CAN 2.0B protocol
  • PCI-Express® 3.0 port with integrated PHY
    • One 2-lane gen2-compliant port
    • or two 1-lane gen2-compliant ports
  • Sixteen 32-bit general-purpose timers
  • 32-bit MPU watchdog timer
  • Ten configurable UART/IrDA/CIR modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI interface
  • Five Inter-Integrated Circuit (I2C) ports
  • SATA interface
  • Eight Multichannel Audio Serial Port (McASP) modules
  • SuperSpeed USB 3.0 dual-role device
  • Three high-speed USB 2.0 dual-role devices
  • Four Multimedia Card/Secure Digital/Secure Digital Input Output interfaces (MMC®/SD®/SDIO)
  • Up to 247 General-Purpose I/O (GPIO) pins
  • Real-Time Clock SubSystem (RTCSS)
  • Device security features
    • Hardware crypto accelerators and DMA
    • Firewalls
    • JTAG® lock
    • Secure keys
    • Secure ROM and boot
  • Power, Reset, and Clock Management (PRSM)
  • On-chip debug with CTools technology
  • Automotive AEC-Q100 qualified
  • 28-nm CMOS technology
  • 23 mm × 23 mm, 0.8-mm pitch, 760-Pin BGA (ABC)

TI’s new TDA2x System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2x family enables broad ADAS applications in automobiles by integrating an optimal mix of performance, low power and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.

The TDA2x SoC enables sophisticated embedded vision technology in automobiles by broadest range of ADAS applications including front camera, park assist, surround view and sensor fusion on a single architecture.

The TDA2x SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation cores, Vision AccelerationPac, Arm® Cortex®-A15 MPCore™ and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerators for rendering virtual views, enable a 3D viewing experience. And the TDA2x SoC also integrates a host of peripherals including multi-camera interfaces (both parallel and serial) for LVDS-based surround view systems, displays, CAN and GigB Ethernet AVB.

The Vision AccelerationPac for this family of products includes multiple embedded vision engines (EVEs) offloading the vision analytics functionality from the application processor while also reducing the power footprint. The Vision AccelerationPac is optimized for vision processing with a 32-bit RISC core for efficient program execution and a vector coprocessor for specialized vision processing.

Additionally, TI provides a complete set of development tools for the Arm, DSP, and EVE coprocessor, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

The TDA2x ADAS processor is qualified according to the AEC-Q100 standard.

TI’s new TDA2x System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2x family enables broad ADAS applications in automobiles by integrating an optimal mix of performance, low power and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.

The TDA2x SoC enables sophisticated embedded vision technology in automobiles by broadest range of ADAS applications including front camera, park assist, surround view and sensor fusion on a single architecture.

The TDA2x SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation cores, Vision AccelerationPac, Arm® Cortex®-A15 MPCore™ and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerators for rendering virtual views, enable a 3D viewing experience. And the TDA2x SoC also integrates a host of peripherals including multi-camera interfaces (both parallel and serial) for LVDS-based surround view systems, displays, CAN and GigB Ethernet AVB.

The Vision AccelerationPac for this family of products includes multiple embedded vision engines (EVEs) offloading the vision analytics functionality from the application processor while also reducing the power footprint. The Vision AccelerationPac is optimized for vision processing with a 32-bit RISC core for efficient program execution and a vector coprocessor for specialized vision processing.

Additionally, TI provides a complete set of development tools for the Arm, DSP, and EVE coprocessor, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

The TDA2x ADAS processor is qualified according to the AEC-Q100 standard.

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Esta familia de productos está disponible para fabricantes de automóviles de gran volumen. Póngase en contacto con su representante de ventas de TI para obtener más información.

Obtenga más información sobre el SoC TDAx para sistemas avanzados de asistencia al conductor (ADAS).

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Documentación técnica

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Ver todo 38
Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos TDA2x ADAS Applications Processor 23mm Package (ABC Package) Silicon Revision 2.0 datasheet (Rev. F) PDF | HTML 6/06/2019
* Guía del usuario TDA2x ADAS Applications Processor Public Technical Reference Manual (Rev. G) 22/02/2020
* Errata TDA2x ADAS Applications Processor (Rev. K) PDF | HTML 8/09/2024
Nota sobre la aplicación Integrating virtual DRM between VISION SDK and PSDK on Jacinto6 SOC PDF | HTML 5/05/2021
Nota sobre la aplicación IVA-HD Sharing Between VISION-SDK and PSDKLA on Jacinto6 SoC PDF | HTML 24/08/2020
Informe Stereo vision- facing the challenges and seeing the opportunities for ADAS (Rev. A) 24/07/2020
Informe Paving the way to self-driving cars with ADAS (Rev. A) 24/07/2020
Nota sobre la aplicación AM57x, DRA7x, and TDA2x EMIF Tools (Rev. E) 6/01/2020
Artículo técnico The need for speed – The future of radar processing PDF | HTML 17/07/2019
Nota sobre la aplicación Integrating New Cameras With Video Input Port on DRA7xx SoCs PDF | HTML 11/06/2019
Nota sobre la aplicación TDA2x/TDA2E Performance (Rev. A) PDF | HTML 10/06/2019
Nota sobre la aplicación The Implementation of YUV422 Output for SRV 2/08/2018
Nota sobre la aplicación MMC DLL Tuning (Rev. B) 31/07/2018
Nota sobre la aplicación Integrating AUTOSAR on TI SoC: Fundamentals 18/06/2018
Nota sobre la aplicación ECC/EDC on TDAxx (Rev. B) 13/06/2018
Nota sobre la aplicación Sharing VPE Between VISIONSDK and PSDKLA 4/05/2018
Nota sobre la aplicación TMS320C66x XMC Memory Protection 31/01/2018
Nota sobre la aplicación DSS Bit Exact Output (Rev. A) 12/01/2018
Nota sobre la aplicación Flashing Utility - mflash 9/01/2018
Informe Embedded low-power deep learning with TIDL 8/12/2017
Nota sobre la aplicación Optimizing DRA7xx and TDA2xx Processors for use with Video Display SERDES (Rev. B) 7/11/2017
Nota sobre la aplicación A Guide to Debugging With CCS on the DRA75x, DRA74x, TDA2x and TDA3x Family of D (Rev. B) 3/11/2017
Nota sobre la aplicación DSS BT656 Workaround for TDA2x (Rev. A) 3/11/2017
Información sobre seguridad funcional Safety Features on VisionSDK 26/10/2017
Nota sobre la aplicación Optimization of GPU-Based Surround View on TI’s TDA2x SoC 12/09/2017
Informe Step into next-gen architectures for multi-camera operations in automobiles 16/06/2017
Artículo técnico Vehicle vision: beyond the crystal ball? PDF | HTML 8/06/2017
Informe Making Cars Safer Through Technology Innovation (Rev. A) 7/06/2017
Nota sobre la aplicación Quality of Service (QoS) Knobs for DRA74x, DRA75x & TDA2x Family of Devices (Rev. A) 15/12/2016
Nota sobre la aplicación Quad Channel Camera Application for Surround View and CMS Camera Systems (Rev. A) 23/08/2016
Nota sobre la aplicación ADAS Power Management 7/03/2016
Informe Multicore SoCs stay a step ahead of SoC FPGAs 23/02/2016
Guía del usuario Vision Application Board User's Guide 9/02/2016
Informe Surround view camera systems for ADAS (Rev. A) 20/10/2015
Nota sobre la aplicación Guide to fix Perf Issues Using QoS Knobs for DRA74x, DRA75x, TDA2x & TD3x Device 13/08/2014
Informe TI Vision SDK, Optimized Vision Libraries for ADAS Systems 14/04/2014
Informe TI Gives Sight to Vision-Enabled Automotive Technologies 16/10/2013
Informe Empowering Automotive Vision with TI’s Vision AccelerationPac 13/10/2013

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

ALTOS-3P-V2 — Radar de imágenes en cascada de cuatro chips de Altos basado en el procesador TDA4

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El Altos V2 es un diseño de radar de imágenes en cascada de cuatro chips basado en el circuito integrado de microondas monolíticos (MMIC) AWR2243 y el procesador TDA4 de TI. Cuenta con (...)

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D3-3P-DEV — Soporte D3 Embedded para cámaras IA, hardware, controladores y firmware

D3 Embedded es una empresa radicada en Estados Unidos que se especializa en soluciones de extremo a extremo que integran detección de visión y radar mmWave, conectividad, procesamiento integrado e inteligencia artificial para aplicaciones de alto rendimiento. Con más de 25 años de experiencia de (...)

Desde: D3 Embedded
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Kit de desarrollo

D3-3P-RVP-TDA2X — Kit del desarrollador RVP-TDA2x de DesignCore® D3 Embedded para procesadores TDA2

La RVP-TDA2x es una plataforma multicámara para sistemas ADAS de alta gama. Incluye dos procesadores de aplicaciones ARM A15, hasta cuatro coprocesadores Vision Acceleration Pac (EVE) y un codificador H.264 acelerado por hardware. El kit de desarrollo admite ocho entradas de cámara, pero se puede (...)

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Kit de desarrollo de software (SDK)

PROCESSOR-SDK-RADAR — RTOS Processor SDK for Radar

El procesador SDK-Vision (kit de desarrollo de software [SDK] Vision) y el procesador SDK-Radar (SDK Radar) son kits de desarrollo de software multiprocesador para procesadores TDAX. El marco de software permite a los usuarios crear diferentes flujos de datos de aplicaciones de sistemas avanzados (...)

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PROCESSOR-SDK-VISION — Linux and RTOS Processor SDK for Vision

El procesador SDK-Vision (kit de desarrollo de software [SDK] Vision) y el procesador SDK-Radar (SDK Radar) son kits de desarrollo de software multiprocesador para procesadores TDAX. El marco de software permite a los usuarios crear diferentes flujos de datos de aplicaciones de sistemas avanzados (...)

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IDE, configuración, compilador o depurador

CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)

CCStudio™ IDE is part of TI's extensive CCStudio™ development ecosystem and is an integrated development environment for TI's microcontrollers, processors, wireless connectivity devices, and radar sensors. CCStudio IDE is available as desktop or cloud-based applications. The cloud version (...)

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SYSCONFIG — Standalone desktop version of SysConfig

CCStudio™ SysConfig is part of TI's extensive CCStudio™ development ecosystem and is a configuration tool that simplifies hardware and software configuration challenges to accelerate software development.

SysConfig provides an intuitive graphical user interface for configuring pins, peripherals, (...)

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Sistema operativo (SO)

GHS-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS

The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
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QNX-3P-NEUTRINO-RTOS — QNX Neutrino RTOS

The QNX Neutrino® Realtime Operating System (RTOS) is a full-featured and robust RTOS designed to enable the next-generation of products for automotive, medical, transportation, military and industrial embedded systems. Microkernel design and modular architecture enable customers to create (...)
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Software de aplicación y estructura

MOMENTA-3P-DL-ALGORITHMS — Algoritmos de aprendizaje profundo de Momenta para aplicaciones de cámara frontal ADAS en procesador

Momenta’s deep learning based algorithms for ADAS applications make full use of the DSP cores and accelerators on TDA4x for neural network processing. Designed to achieve market leading computational and power efficiency, Momenta’s algorithms offer an array of pre- and post-imaging (...)

Desde: Momenta
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Modelo de simulación

TDA2x BSDL Model

SPRM670.ZIP (28 KB) - Modelo BSDL
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Modelo de simulación

TDA2x IBIS Model

SPRM671.ZIP (36408 KB) - Modelo IBIS
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Modelo de simulación

TDA2x Thermal Model

SPRM672.ZIP (3 KB) - Modelo térmico
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Herramienta de cálculo

CLOCKTREETOOL — Herramienta de árbol de reloj para Sitara, automoción, análisis de visión y procesadores de señal di

The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:

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Encapsulado Pines Símbolos CAD, huellas y modelos 3D
FCBGA (ABC) 760 Ultra Librarian

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