AM62P

ACTIVO

SoC Arm® Cortex®-A53 con triple pantalla, gráficos 3D y códec de video 4K para HMI

Detalles del producto

CPU 2 Arm Cortex-A53, 4 Arm Cortex-A53 Frequency (MHz) 1400 Coprocessors 1 Arm Cortex-R5F Graphics acceleration 1 3D Display type 1 DSI, MIPI DPI, OLDI Protocols Ethernet, TSN Hardware accelerators CPU only, Video decode accelerator, Video encode accelerator Features General purpose Operating system Android, Linux Security Secure boot Rating Catalog Power supply solution TPS65224 Operating temperature range (°C) -40 to 125 Edge AI enabled Yes
CPU 2 Arm Cortex-A53, 4 Arm Cortex-A53 Frequency (MHz) 1400 Coprocessors 1 Arm Cortex-R5F Graphics acceleration 1 3D Display type 1 DSI, MIPI DPI, OLDI Protocols Ethernet, TSN Hardware accelerators CPU only, Video decode accelerator, Video encode accelerator Features General purpose Operating system Android, Linux Security Secure boot Rating Catalog Power supply solution TPS65224 Operating temperature range (°C) -40 to 125 Edge AI enabled Yes
FCBGA (AMH) 466 289 mm² 17 x 17

Processor Cores:

  • Up to Quad 64-bit Arm Cortex-A53 microprocessor subsystem at up to 1.4GHz
    • Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC
    • Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection
  • Single-core Arm Cortex-R5F at up to 800MHz, integrated as part of MCU Channel with FFI
    • 32KB ICache, 32KB L1 DCache, and 64KB TCM with SECDED ECC on all memories
    • 512KB SRAM with SECDED ECC
  • Single-core Arm Cortex-R5F at up to 800MHz, integrated to support Device Management
    • 32KB ICache, 32KB L1 DCache, and 64KB TCM with SECDED ECC on all memories

Multimedia:

  • Display subsystem
    • Triple display support over OLDI (LVDS) (1x OLDI-DL, 1x or 2x OLDI-SL), DSI or DPI
      • OLDI-SL (Single Link): up to 1920 x 1080 at 60fps (165MHZ Pixel Clock)
      • OLDI-DL (Dual Link): up to 3840 x 1080 at 60fps (150MHz Pixel Clock)
      • MIPI DSI: with 4 Lane MIPI® D-PHY supports up to 3840 x 1080 at 60fps (300MHz Pixel Clock)
      • DPI (24-bit RGB parallel interface): up to 1920 x 1080 at 60fps (165MHz pixel clock)
    • Four display pipelines with hardware overlay support. A maximum of two display pipelines may be used per display.
    • Supports safety features such as freeze frame detection and data correctness check
  • 3D Graphics Processing Unit
    • IMG BXS-4-64 with 256KB cache
    • Up to 50GFLOPS
    • Single shader core
    • OpenGL ES3.2 and Vulkan 1.2 API support
  • One Camera Serial Interface (CSI-2) Receiver with 4 Lane D-PHY
    • MIPI® CSI-2 v1.3 Compliant + MIPI D-PHY 1.2
    • Support for 1,2,3 or 4 data lane mode up to 2.5Gbps per lane
    • ECC verification/correction with CRC check + ECC on RAM
    • Virtual Channel support (up to 16)
    • Ability to write stream data directly to DDR via DMA
  • Video Encoder/Decoder
    • Support for HEVC (H.265) Main profiles at Level 5.1 High-tier
    • Support for H.264 BaseLine/Main/High Profiles at Level 5.2
    • Support for up to 4K UHD resolution (3840 × 2160)
      • Up to 300MPixels/s operation, with reduced clocking options available for lower power applications with lower performance needs

Memory Subsystem:

  • Up to 1.09MB of On-chip RAM
    • 64KB of On-Chip RAM (OCRAM) with SECDED ECC, can be divided into smaller banks in increments of 32KB for as many as 2 separate memory banks
    • 256KB of On-Chip RAM with SECDED ECC in SMS Subsystem
    • 176KB of On-Chip RAM with SECDED ECC in SMS Subsystem for TI security firmware
    • 512KB of On-chip RAM with SECDED ECC in Cortex-R5F MCU Subsystem
    • 64KB of On-chip RAM with SECDED ECC in Device Manager Subsystem
  • DDR Subsystem (DDRSS)
    • Supports LPDDR4 memory type
    • 32-bit data bus with inline ECC
    • Supports speeds up to 3733MT/s
    • Max size of 8GB

Functional Safety:

  • Functional Safety-Compliant targeted [Industrial]
    • Developed for functional safety applications
    • Documentation will be available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL 3 targeted
    • Hardware Integrity up to SIL 2 targeted
    • Safety-related certification
      • IEC 61508 by TÜV SÜD planned
  • Functional Safety-Compliant targeted [Automotive]
    • Developed for functional safety applications
    • Documentation will be available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL D targeted
    • Hardware integrity up to ASIL B targeted
    • Safety-related certification
      • ISO 26262 by TÜV SÜD planned
  • AEC - Q100 qualified [Automotive]

Security:

  • Secure boot supported
    • Hardware-enforced Root-of-Trust (RoT)
    • Support to switch RoT via backup key
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Trusted Execution Environment (TEE) supported
    • Arm TrustZone based TEE
    • Extensive firewall support for isolation
    • Secure watchdog/timer/IPC
    • Secure storage support
    • Replay Protected Memory Block (RPMB) support
  • Dedicated Security Controller with user programmable HSM core and dedicated security DMA & IPC subsystem for isolated processing
  • Cryptographic acceleration supported
    • Session-aware cryptographic engine with ability to auto-switch key-material based on incoming data stream
      • Supports cryptographic cores
    • AES – 128-/192-/256-Bit key sizes
    • SHA2 – 224-/256-/384-/512-Bit key sizes
    • DRBG with true random number generator
    • PKA (Public Key Accelerator) to Assist in RSA/ECC processing for secure boot
  • Debugging security
    • Secure software controlled debug access
    • Security aware debugging

High-Speed Interfaces:

  • Integrated Ethernet switch supporting (total 2 external ports)
    • RMII(10/100) or RGMII (10/100/1000)
    • IEEE1588 (Annex D, Annex E, Annex F with 802.1AS PTP)
    • Clause 45 MDIO PHY management
    • Packet Classifier based on ALE engine with 512 classifiers
    • Priority based flow control
    • Time Sensitive Networking (TSN) support
    • Four CPU H/W interrupt Pacing
    • IP/UDP/TCP checksum offload in hardware
  • Two USB2.0 Ports
    • Port configurable as USB host, USB peripheral, or USB Dual-Role Device (DRD mode)
    • Integrated USB VBUS detection

General Connectivity:

  • 9x Universal Asynchronous Receiver-Transmitters (UART)
  • 5x Serial Peripheral Interface (SPI) controllers
  • 6x Inter-Integrated Circuit (I2C) ports
  • 3x Multichannel Audio Serial Ports (McASP)
    • Transmit and Receive Clocks up to 50MHz
    • Up to 4/6/16 Serial Data Pins across 3x McASP with Independent TX and RX Clocks
    • Supports Time Division Multiplexing (TDM), Inter-IC Sound (I2S), and Similar Formats
    • Supports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)
    • FIFO Buffers for Transmit and Receive (256 Bytes)
    • Support for audio reference output clock
  • 3x enhanced PWM modules (ePWM)
  • 3x enhanced Quadrature Encoder Pulse modules (eQEP)
  • 3x enhanced Capture modules (eCAP)
  • General-Purpose I/O (GPIO), All LVCMOS I/O can be configured as GPIO
  • 4x Controller Area Network (CAN) modules with CAN-FD support
    • Conforms w/ CAN Protocol 2.0 A, B and ISO 11898-1
    • Full CAN-FD support (up to 64 data bytes)
    • Parity/ECC check for Message RAM
    • Speed up to 8Mbps

Media and Data Storage:

  • 3x Multi-Media Card/Secure Digital (MMC/SD/SDIO) interfaces
    • 1x 8-bit eMMC interface up to:
      • HS200 for non-Q1 devices
      • HS400 for Q1 devices
    • 2x 4-bit SD/SDIO interfaces up to UHS-I
    • Compliant with eMMC 5.1, SD 3.0, and SDIO Version 3.0
  • 1× General-Purpose Memory Controller (GPMC) up to 133MHz
    • Flexible 8- and 16-bit Asynchronous Memory Interface with up to four Chip (22-bit address) Selects (NAND, NOR, Muxed-NOR, and SRAM)
    • Uses BCH code to support 4-, 8-, or 16-bit ECC
    • Uses Hamming code to support 1-bit ECC
    • Error Locator Module (ELM)
      • Used with the GPMC to locate addresses of data errors from syndrome polynomials generated using a BCH algorithm
      • Supports 4-, 8-, and 16-bit per 512-Byte block error location based on BCH algorithms
  • OSPI/QSPI with DDR / SDR support
    • Support for Serial NAND and Serial NOR Flash devices
    • 4GBytes memory address support
    • XIP mode with optional on-the-fly encryption

Power Management:

  • Low-power modes supported by Device Manager:
    • Partial IO support for CAN/GPIO/UART wakeup
    • I/O Only + DDR in Self Refresh for Suspend to RAM
    • DeepSleep
    • MCU Only
    • Standby
    • Dynamic frequency scaling

Optimal Power Management Solution:

  • Recommended TI Power Management ICs (PMIC)
    • Supports up to Automotive ASIL-B functional safety when powering the AEC – Q100 qualified AM62P-Q1 device
    • Supports up to SIL-2 functional safety industrial applications when powering the AM62P device
    • Companion PMIC is specially designed to meet power supply requirements
    • Flexible mapping and factory programmed configurations to support different use cases

Boot Options:

  • UART
  • I2C EEPROM
  • OSPI/QSPI Flash
  • GPMC NOR/NAND Flash
  • SD Card
  • eMMC
  • USB (host) Mass storage
  • USB (device) boot from external host (DFU mode)
  • Ethernet

Technology / Package:

  • 16nm FinFET technology
  • 17mm x 17mm, 0.65/0.8mm pitch with VCA, 466-pin FCBGA

Processor Cores:

  • Up to Quad 64-bit Arm Cortex-A53 microprocessor subsystem at up to 1.4GHz
    • Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC
    • Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection
  • Single-core Arm Cortex-R5F at up to 800MHz, integrated as part of MCU Channel with FFI
    • 32KB ICache, 32KB L1 DCache, and 64KB TCM with SECDED ECC on all memories
    • 512KB SRAM with SECDED ECC
  • Single-core Arm Cortex-R5F at up to 800MHz, integrated to support Device Management
    • 32KB ICache, 32KB L1 DCache, and 64KB TCM with SECDED ECC on all memories

Multimedia:

  • Display subsystem
    • Triple display support over OLDI (LVDS) (1x OLDI-DL, 1x or 2x OLDI-SL), DSI or DPI
      • OLDI-SL (Single Link): up to 1920 x 1080 at 60fps (165MHZ Pixel Clock)
      • OLDI-DL (Dual Link): up to 3840 x 1080 at 60fps (150MHz Pixel Clock)
      • MIPI DSI: with 4 Lane MIPI® D-PHY supports up to 3840 x 1080 at 60fps (300MHz Pixel Clock)
      • DPI (24-bit RGB parallel interface): up to 1920 x 1080 at 60fps (165MHz pixel clock)
    • Four display pipelines with hardware overlay support. A maximum of two display pipelines may be used per display.
    • Supports safety features such as freeze frame detection and data correctness check
  • 3D Graphics Processing Unit
    • IMG BXS-4-64 with 256KB cache
    • Up to 50GFLOPS
    • Single shader core
    • OpenGL ES3.2 and Vulkan 1.2 API support
  • One Camera Serial Interface (CSI-2) Receiver with 4 Lane D-PHY
    • MIPI® CSI-2 v1.3 Compliant + MIPI D-PHY 1.2
    • Support for 1,2,3 or 4 data lane mode up to 2.5Gbps per lane
    • ECC verification/correction with CRC check + ECC on RAM
    • Virtual Channel support (up to 16)
    • Ability to write stream data directly to DDR via DMA
  • Video Encoder/Decoder
    • Support for HEVC (H.265) Main profiles at Level 5.1 High-tier
    • Support for H.264 BaseLine/Main/High Profiles at Level 5.2
    • Support for up to 4K UHD resolution (3840 × 2160)
      • Up to 300MPixels/s operation, with reduced clocking options available for lower power applications with lower performance needs

Memory Subsystem:

  • Up to 1.09MB of On-chip RAM
    • 64KB of On-Chip RAM (OCRAM) with SECDED ECC, can be divided into smaller banks in increments of 32KB for as many as 2 separate memory banks
    • 256KB of On-Chip RAM with SECDED ECC in SMS Subsystem
    • 176KB of On-Chip RAM with SECDED ECC in SMS Subsystem for TI security firmware
    • 512KB of On-chip RAM with SECDED ECC in Cortex-R5F MCU Subsystem
    • 64KB of On-chip RAM with SECDED ECC in Device Manager Subsystem
  • DDR Subsystem (DDRSS)
    • Supports LPDDR4 memory type
    • 32-bit data bus with inline ECC
    • Supports speeds up to 3733MT/s
    • Max size of 8GB

Functional Safety:

  • Functional Safety-Compliant targeted [Industrial]
    • Developed for functional safety applications
    • Documentation will be available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL 3 targeted
    • Hardware Integrity up to SIL 2 targeted
    • Safety-related certification
      • IEC 61508 by TÜV SÜD planned
  • Functional Safety-Compliant targeted [Automotive]
    • Developed for functional safety applications
    • Documentation will be available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL D targeted
    • Hardware integrity up to ASIL B targeted
    • Safety-related certification
      • ISO 26262 by TÜV SÜD planned
  • AEC - Q100 qualified [Automotive]

Security:

  • Secure boot supported
    • Hardware-enforced Root-of-Trust (RoT)
    • Support to switch RoT via backup key
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Trusted Execution Environment (TEE) supported
    • Arm TrustZone based TEE
    • Extensive firewall support for isolation
    • Secure watchdog/timer/IPC
    • Secure storage support
    • Replay Protected Memory Block (RPMB) support
  • Dedicated Security Controller with user programmable HSM core and dedicated security DMA & IPC subsystem for isolated processing
  • Cryptographic acceleration supported
    • Session-aware cryptographic engine with ability to auto-switch key-material based on incoming data stream
      • Supports cryptographic cores
    • AES – 128-/192-/256-Bit key sizes
    • SHA2 – 224-/256-/384-/512-Bit key sizes
    • DRBG with true random number generator
    • PKA (Public Key Accelerator) to Assist in RSA/ECC processing for secure boot
  • Debugging security
    • Secure software controlled debug access
    • Security aware debugging

High-Speed Interfaces:

  • Integrated Ethernet switch supporting (total 2 external ports)
    • RMII(10/100) or RGMII (10/100/1000)
    • IEEE1588 (Annex D, Annex E, Annex F with 802.1AS PTP)
    • Clause 45 MDIO PHY management
    • Packet Classifier based on ALE engine with 512 classifiers
    • Priority based flow control
    • Time Sensitive Networking (TSN) support
    • Four CPU H/W interrupt Pacing
    • IP/UDP/TCP checksum offload in hardware
  • Two USB2.0 Ports
    • Port configurable as USB host, USB peripheral, or USB Dual-Role Device (DRD mode)
    • Integrated USB VBUS detection

General Connectivity:

  • 9x Universal Asynchronous Receiver-Transmitters (UART)
  • 5x Serial Peripheral Interface (SPI) controllers
  • 6x Inter-Integrated Circuit (I2C) ports
  • 3x Multichannel Audio Serial Ports (McASP)
    • Transmit and Receive Clocks up to 50MHz
    • Up to 4/6/16 Serial Data Pins across 3x McASP with Independent TX and RX Clocks
    • Supports Time Division Multiplexing (TDM), Inter-IC Sound (I2S), and Similar Formats
    • Supports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)
    • FIFO Buffers for Transmit and Receive (256 Bytes)
    • Support for audio reference output clock
  • 3x enhanced PWM modules (ePWM)
  • 3x enhanced Quadrature Encoder Pulse modules (eQEP)
  • 3x enhanced Capture modules (eCAP)
  • General-Purpose I/O (GPIO), All LVCMOS I/O can be configured as GPIO
  • 4x Controller Area Network (CAN) modules with CAN-FD support
    • Conforms w/ CAN Protocol 2.0 A, B and ISO 11898-1
    • Full CAN-FD support (up to 64 data bytes)
    • Parity/ECC check for Message RAM
    • Speed up to 8Mbps

Media and Data Storage:

  • 3x Multi-Media Card/Secure Digital (MMC/SD/SDIO) interfaces
    • 1x 8-bit eMMC interface up to:
      • HS200 for non-Q1 devices
      • HS400 for Q1 devices
    • 2x 4-bit SD/SDIO interfaces up to UHS-I
    • Compliant with eMMC 5.1, SD 3.0, and SDIO Version 3.0
  • 1× General-Purpose Memory Controller (GPMC) up to 133MHz
    • Flexible 8- and 16-bit Asynchronous Memory Interface with up to four Chip (22-bit address) Selects (NAND, NOR, Muxed-NOR, and SRAM)
    • Uses BCH code to support 4-, 8-, or 16-bit ECC
    • Uses Hamming code to support 1-bit ECC
    • Error Locator Module (ELM)
      • Used with the GPMC to locate addresses of data errors from syndrome polynomials generated using a BCH algorithm
      • Supports 4-, 8-, and 16-bit per 512-Byte block error location based on BCH algorithms
  • OSPI/QSPI with DDR / SDR support
    • Support for Serial NAND and Serial NOR Flash devices
    • 4GBytes memory address support
    • XIP mode with optional on-the-fly encryption

Power Management:

  • Low-power modes supported by Device Manager:
    • Partial IO support for CAN/GPIO/UART wakeup
    • I/O Only + DDR in Self Refresh for Suspend to RAM
    • DeepSleep
    • MCU Only
    • Standby
    • Dynamic frequency scaling

Optimal Power Management Solution:

  • Recommended TI Power Management ICs (PMIC)
    • Supports up to Automotive ASIL-B functional safety when powering the AEC – Q100 qualified AM62P-Q1 device
    • Supports up to SIL-2 functional safety industrial applications when powering the AM62P device
    • Companion PMIC is specially designed to meet power supply requirements
    • Flexible mapping and factory programmed configurations to support different use cases

Boot Options:

  • UART
  • I2C EEPROM
  • OSPI/QSPI Flash
  • GPMC NOR/NAND Flash
  • SD Card
  • eMMC
  • USB (host) Mass storage
  • USB (device) boot from external host (DFU mode)
  • Ethernet

Technology / Package:

  • 16nm FinFET technology
  • 17mm x 17mm, 0.65/0.8mm pitch with VCA, 466-pin FCBGA

The AM62Px (P = Plus) is an extension of the existing Sitara™ AM62x low-cost family of application processors built for high-performance embedded 3D display applications. Scalable Arm® Cortex®-A53 performance and embedded features, such as: multi-screen high-definition display support, 3D-graphics acceleration, 4K video acceleration, and extensive peripherals make the AM62Px well-suited for a broad range of automotive and industrial applications, including automotive digital instrumentation, automotive displays, industrial HMI, and more.

Key features and benefits:

  • Focus on innovation and fast development with Linux and Android™ SDKs accompanied with real-time functional safety and security SDKs.
  • Address next wave of HMI designs with new generation of 3D GPU and 4K video acceleration.
  • Enhance your design connectivity with an extensive set of automotive and high-speed IOs, including: 4x CAN-FD, 3-port Gigabit Ethernet switch (two external ports) with TSN support, and two USB2.0 ports.
  • Supports the latest cybersecurity requirements with the built-in Hardware Security Module (HSM).
  • Provides intelligent features, such as: facial recognition and touchless HMI with Arm® Cortex®-A53 CPUs and open-source AI software and tools

The AM62Px processors comply with the AEC - Q100 automotive standard and support industrial-grade. ASIL-B and SIL-2 functional safety requirements can be addressed using an integrated Arm Cortex-R5F core and dedicated peripherals, which can all be isolated from the rest of the processor.

Products in the AM62Px processor family:

AM62P-Q1 – Automotive digital instrumentation SoC with scalable Arm Cortex-A53 performance, multi high-definition display support, 3D GPU and 4K video acceleration.

Featured design resources:

  • Hardware Evaluation Module (EVM) - SK-AM62P-LP
  • Software Development Kit (SDK) - PROCESSOR-SDK-AM62P
  • Linux Academy

The AM62Px (P = Plus) is an extension of the existing Sitara™ AM62x low-cost family of application processors built for high-performance embedded 3D display applications. Scalable Arm® Cortex®-A53 performance and embedded features, such as: multi-screen high-definition display support, 3D-graphics acceleration, 4K video acceleration, and extensive peripherals make the AM62Px well-suited for a broad range of automotive and industrial applications, including automotive digital instrumentation, automotive displays, industrial HMI, and more.

Key features and benefits:

  • Focus on innovation and fast development with Linux and Android™ SDKs accompanied with real-time functional safety and security SDKs.
  • Address next wave of HMI designs with new generation of 3D GPU and 4K video acceleration.
  • Enhance your design connectivity with an extensive set of automotive and high-speed IOs, including: 4x CAN-FD, 3-port Gigabit Ethernet switch (two external ports) with TSN support, and two USB2.0 ports.
  • Supports the latest cybersecurity requirements with the built-in Hardware Security Module (HSM).
  • Provides intelligent features, such as: facial recognition and touchless HMI with Arm® Cortex®-A53 CPUs and open-source AI software and tools

The AM62Px processors comply with the AEC - Q100 automotive standard and support industrial-grade. ASIL-B and SIL-2 functional safety requirements can be addressed using an integrated Arm Cortex-R5F core and dedicated peripherals, which can all be isolated from the rest of the processor.

Products in the AM62Px processor family:

AM62P-Q1 – Automotive digital instrumentation SoC with scalable Arm Cortex-A53 performance, multi high-definition display support, 3D GPU and 4K video acceleration.

Featured design resources:

  • Hardware Evaluation Module (EVM) - SK-AM62P-LP
  • Software Development Kit (SDK) - PROCESSOR-SDK-AM62P
  • Linux Academy

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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Fecha
* Data sheet AM62Px Sitara™ Processors datasheet (Rev. C) PDF | HTML 24 oct 2025
* Errata AM62Px Sitara™ Processors Silicon Errata (Rev. B) PDF | HTML 31 oct 2025
* User guide AM62Px Sitara™ Processors Technical Reference Manual (Rev. D) 05 feb 2026
Application note Throughput Characterization of OSPI and QSPI Serial NOR/NAND Flash Operations PDF | HTML 17 feb 2026
Application note AM62Px eMMC Board Design and Layout Guidelines PDF | HTML 27 ene 2026
Application note Linux Audio on Sitara Socs PDF | HTML 12 dic 2025
Application note Convert Sitara MPU HS-FS Silicon to HS-SE with No Boot Mode Switch PDF | HTML 05 dic 2025
Application note xSPI Custom Flash Debug Guide PDF | HTML 01 dic 2025
Application note Enabling Matter on Sitara MPU (Rev. A) PDF | HTML 24 nov 2025
Application note Getting Started with Sysconfig Tool PDF | HTML 21 nov 2025
Application note Thermal Management of TDA4x and AM6x PDF | HTML 30 oct 2025
User guide Hardware Design Considerations for Custom Board Using AM62P, AM62P-Q1 Family of Processors (Rev. C) PDF | HTML 24 oct 2025
Application note Sitara Processor Power Distribution Networks: Implementation and Analysis (Rev. H) PDF | HTML 17 oct 2025
User guide AM62P, AM62P-Q1 Processor Family Schematic, Design Guidelines and Review Checklist (Rev. B) PDF | HTML 17 sep 2025
User guide AM62x, AM62Ax, AM62D-Q1 and AM62Px Processor Family Schematic, Design Guidelines and Review Checklist (Rev. I) PDF | HTML 17 sep 2025
Application note AM62x, AM62Ax, AM62Px, AM62Lx Spread-Spectrum Clocking PDF | HTML 08 sep 2025
Application note Custom Board Design and Simulation Guidelines for Processor High Speed Parallel Interfaces (Rev. A) PDF | HTML 05 sep 2025
Application note AM62P DSS Overview PDF | HTML 24 jul 2025
Application note OSPI NOR Flash Debug Support on AM6x and TDA4VEN 24 jul 2025
Functional safety information AM6x, AM24x Software Diagnostics Library TÜV SÜD Functional Safety Certificate for 9.2.0 SDK (Rev. A) 17 jul 2025
Application note Display Interfaces: A Comprehensive Guide to Sitara MPU Visualization Designs (Rev. A) PDF | HTML 28 feb 2025
White paper Securing Arm-Based Application Processors (Rev. F) PDF | HTML 26 feb 2025
Application note MCAN Debug Guide PDF | HTML 18 feb 2025
Application note Early Splash Screen With Flicker-Free Transition PDF | HTML 04 feb 2025
Application note Microcontroller Abstraction Layer on Jacinto™ and Sitara™ Embedded Processors PDF | HTML 28 ene 2025
Application note AM62Ax, AM62Px LPDDR4 Board Design and Layout Guidelines (Rev. B) PDF | HTML 17 dic 2024
Product overview AM62P - Arm® Cortex®-A53 Microprocessor PDF | HTML 16 oct 2024
Application note Basic Ethernet Interface Debug With Linux PDF | HTML 11 oct 2024
User guide AM62P Power Estimation Tool User's Guide PDF | HTML 24 sep 2024
Application note Minimal Platform Development on AM62x Devices (Rev. A) PDF | HTML 24 sep 2024
Application note Sitara AM62P Benchmarks (Rev. A) PDF | HTML 13 ago 2024
Application note LVDS Panel Integration on AM62P PDF | HTML 05 ago 2024
Application note Debugging GPU Driver Issues on TDA4x and AM6x Devices PDF | HTML 20 jun 2024
Application brief Top Five Design Considerations for Smart Multi-display Systems PDF | HTML 22 mar 2024
Product overview PMIC for Powering AM62Px Devices PDF | HTML 14 mar 2024
Application note Developing Multiple-Camera Applications on AM6x (Rev. A) PDF | HTML 14 feb 2024
Application note AM62Px Escape Guidelines (Rev. B) PDF | HTML 11 ene 2024
Application note High-Speed Interface Layout Guidelines (Rev. J) PDF | HTML 24 feb 2023

Diseño y desarrollo

Soluciones de alimentación

Busque las soluciones de alimentación disponibles para el AM62P. TI ofrece soluciones de alimentación para sistemas en chip (SoC), procesadores, microcontroladores, sensores y matrices de compuertas programables de campo (FPGA), sean o no de TI.

Placa de evaluación

SK-AM62P-LP — Módulo de evaluación del kit básico AM62P

El módulo de evaluación (EVM) del kit de inicio (SK) SK-AM62P-LP se basa en nuestro procesador de pantalla AM62P, que incluye rendimiento Arm® Cortex®-A53 escalable y funciones integradas, como soporte de triple pantalla de alta definición, unidad de procesamiento gráfico (GPU) 3D de alto (...)

Guía del usuario: PDF | HTML
Placa de evaluación

CRLNK-3P-MITYSOM-AM62P — Sistema en módulo (SOM) Critical Link para procesadores de AM62P

La familia MitySOM-AM62P de system-on-modules incorpora el procesador Sitara AM62Px de Texas Instruments. El módulo incluye memoria FLASH eMMC (opcional), memoria FLASH NOR SPI cuádruple u octal (opcional) y memoria RAM LPDDR4. El MitySOM-AM62P es una solución apta para producción, diseñada para (...)
Sonda de depuración

TMDSEMU110-U — Sonda de depuración XDS110 JTAG

El XDS110 de Texas Instruments es una nueva clase de sonda de depuración (emulador) para procesadores integrados de TI. El XDS110 sustituye a la familia XDS100, al tiempo que es compatible con una mayor variedad de estándares (IEEE1149.1, IEEE1149.7, SWD) en un único pod. Todas las sondas de (...)

Guía del usuario: PDF
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Sonda de depuración

TMDSEMU200-U — Sonda de depuración XDS200 USB

El XDS200 es una sonda de depuración (emulador) que se utiliza para depurar dispositivos integrados de TI. Para la mayoría de los dispositivos, se recomienda utilizar el XDS110 (www.ti.com/tool/TMDSEMU110-U), que es más nuevo y de menor costo. El XDS200 es compatible con una amplia variedad de (...)

Sonda de depuración

TMDSEMU560V2STM-U — Sonda de depuración USB de seguimiento del sistema XDS560v2

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).  Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

Sonda de depuración

TMDSEMU560V2STM-UE — Sonda de depuración USB y ethernet de seguimiento del sistema XDS560v2

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

Sonda de depuración

LB-3P-TRACE32-ARM — Sistema de depuración y seguimiento Lauterbach TRACE32 para microcontroladores y procesadores basado

Lauterbach‘s TRACE32® tools are a suite of leading-edge hardware and software components that enables developers to analyze, optimize and certify all kinds of Arm®-based microcontrollers and processors. The globally renowned debug and trace solutions for embedded systems and SoCs are the perfect (...)

Sonda de depuración

TSK-3P-BLUEBOX — TASKING BlueBox hardware debugger

TASKING’s Debug, Trace, and Test tools offer comprehensive solutions for efficient debugging, tracing, and testing of TI's embedded systems. The scalable TASKING BlueBox debuggers allow users to easily flash, debug, and test across TI's portfolio. Development on TI hardware is made even easier with (...)

Kit de desarrollo de software (SDK)

MCU-PLUS-SDK-AM62P MCU+ SDK for AM62P – RTOS, No-RTOS

The AM62P processor Linux®, Android™ and TI MCU+ software development kits (SDKs) are unified software platforms for embedded processors providing easy setup and fast out-of-box access to benchmarks and demonstrations.

All releases of this SDK are consistent across our broad portfolio for which (...)

Productos y hardware compatibles

Productos y hardware compatibles

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Kit de desarrollo de software (SDK)

PROCESSOR-SDK-ANDROID-AM62P Processor SDK Android for AM62P

The AM62P processor Linux®, Android™ and TI MCU+ software development kits (SDKs) are unified software platforms for embedded processors providing easy setup and fast out-of-box access to benchmarks and demonstrations.

All releases of this SDK are consistent across our broad portfolio for which (...)

Productos y hardware compatibles

Productos y hardware compatibles

Opciones de descarga
Kit de desarrollo de software (SDK)

PROCESSOR-SDK-LINUX-AM62P Processor SDK Linux for AM62P

The AM62P processor Linux®, Android™ and TI MCU+ software development kits (SDKs) are unified software platforms for embedded processors providing easy setup and fast out-of-box access to benchmarks and demonstrations.

All releases of this SDK are consistent across our broad portfolio for which (...)

Productos y hardware compatibles

Productos y hardware compatibles

Opciones de descarga
Kit de desarrollo de software (SDK)

PROCESSOR-SDK-LINUX-RT-AM62P Processor SDK Linux RT for AM62P

The AM62P processor Linux®, Android™ and TI MCU+ software development kits (SDKs) are unified software platforms for embedded processors providing easy setup and fast out-of-box access to benchmarks and demonstrations.

All releases of this SDK are consistent across our broad portfolio for which (...)

Productos y hardware compatibles

Productos y hardware compatibles

Opciones de descarga
Software de aplicación y estructura

CANDERA-3P-CGI-STUDIO — Candera CGI Studio HMI development software for AM62x Sitara processors

Candera CGI Studio is a powerful design tool for creating dynamic HMIs across diverse industries. It provides an intuitive workflow with state-of-the-art 2D/3D graphics, scalable architecture, and full multi-language support. Designed for efficiency and flexibility, it enables seamless (...)
Desde: Candera GmbH
Ejemplo de código o demostración

KDAB-3P-QT-DEMOS — KDAB Group human machine interface (HMI) demo software examples written in Qt for AM6 processors

The KDAB Multi-Screen Demo for Texas Instruments AM62 and AM62P showcases the scalable graphics and display capabilities of TI’s AM623, AM625, and AM62P processors. Built with Qt, this demo highlights multi-display rendering, smooth UI performance, and hardware-accelerated graphics, demonstrating (...)
Desde: KDAB Group
Firmware

DDR-MARGIN-FW Firmware and scripts to measure system DDR margin

The DDR margin firmware and supporting scripts allow visualization and measurement of system margin in the DDR interface on board. These tools enable probe-less measurement of critical data signals to understand the integrity and robustness of the interface.
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Opciones de descarga
GUI para el módulo de evaluación (EVM)

QT-3P-GUI — Qt-Group graphical user interface (GUI) software example demos for Arm-based processors

These Qt demos highlight the simplicity of bridging/importing graphics assets to Qt Design Studio where interactivity, animations, and pixel perfect UI/UX design is represented on the functioning display. With the QML code generated from Qt Design Studio, the HMI display created in Qt Design Studio (...)
Desde: QT Group
Primeros pasos

TI-DEVELOPER-ZONE Start embedded development on your desktop or in the cloud

From evaluation to deployment the TI Developer Zone provides a comprehensive range of software, tools and training to ensure that you have everything you need for each stage of the development process.
Productos y hardware compatibles

Productos y hardware compatibles

IDE, configuración, compilador o depurador

CCSTUDIO Code Composer Studio™ integrated development environment (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize embedded applications. Code Composer Studio is available across Windows®, Linux® and macOS® platforms.

(...)

Productos y hardware compatibles

Productos y hardware compatibles

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IDE, configuración, compilador o depurador

DDR-CONFIG-AM62P DDR Configuration Tool

This SysConfig based tool simplifies the process of configuring the DDR Subsystem Controller and PHY to interface to SDRAM devices. Based on the memory device, board design, and topology the tool outputs files to initialize and train the selected memory.
Productos y hardware compatibles

Productos y hardware compatibles

IDE, configuración, compilador o depurador

K3-RESOURCE-CONFIGURATION Resource partitioning tool for multi core SOCs

Also known as the k3-respart-tool, the Resource Configuration tool allows for configuration of various system level parameters and generate the necessary data to be fed into software components
Productos y hardware compatibles

Productos y hardware compatibles

IDE, configuración, compilador o depurador

SYSCONFIG Standalone desktop version of SysConfig

SysConfig is a configuration tool designed to simplify hardware and software configuration challenges to accelerate software development.

SysConfig is available as part of the Code Composer Studio™ integrated development environment as well as a standalone application. Additionally SysConfig (...)

Productos y hardware compatibles

Productos y hardware compatibles

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Capacitación en línea

AM62P-ACADEMY AM62P Academy

AM62P Academy is designed to simplify and accelerate custom AM62Px development.
Productos y hardware compatibles

Productos y hardware compatibles

Sistema operativo (SO)

GHS-3P-INTEGRITY-RTOS — INTEGRITY RTOS de Green Hills

The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
Sistema operativo (SO)

GHS-3P-UVELOSITY — Green Hills Software u-velOSity Safety RTOS

The µ-velOSity™ Safety RTOS is the smallest of Green Hills Software's real-time operating systems and was designed especially for microcontrollers. It supports a wide range of TI processor families using the Arm® Cortex-M or Cortex-R cores as a main CPU or as a co-processors (...)
Sistema operativo (SO)

TRZN-3P-TORIZON-OS — Torizon OS ready-to-use industrial embedded Linux distribution

Torizon OS is a free and open-source Industrial Embedded Linux OS focusing on simplifying the development and maintenance of products requiring high reliability and security. It features, among other essential services, an optimal container runtime and components for secure offline and remote (...)
Desde: Torizon
Sistema operativo (SO)

WHIS-3P-SAFERTOS — RTOS de seguridad precertificado SAFERTOS de WITTENSTEIN

SAFERTOS® es un sistema operativo único en tiempo real diseñado para procesadores integrados. Está precertificado según las normas IEC 61508 SIL3 e ISO 26262 ASILD por TÜV SÜD. SAFERTOS® se diseñó específicamente para la seguridad por el equipo de expertos de WHIS y se usa globalmente en (...)
Soporte de software

PROCESSOR-SDK-QNX-AM62P Processor SDK QNX for AM62P

The AM62P processor Linux®, Android™ and TI MCU+ software development kits (SDKs) are unified software platforms for embedded processors providing easy setup and fast out-of-box access to benchmarks and demonstrations.

All releases of this SDK are consistent across our broad portfolio for which (...)

Productos y hardware compatibles

Productos y hardware compatibles

Modelo de simulación

AM62P and AM62P-Q1 Sitara™ BSDL Model (Rev. A)

SPRM827A.ZIP (10 KB) - BSDL Model
Modelo de simulación

AM62Px Sitara™ AMI Model

SPRM826.ZIP (61927 KB) - IBIS-AMI Model
Modelo de simulación

AM62Px Sitara™ IBIS Model (Rev. C)

SPRM825C.ZIP (3296 KB) - IBIS Model
Modelo de simulación

AM62Px Sitara™ Thermal Model

SPRM828.ZIP (1 KB) - Thermal Model
Herramienta de simulación

AM62P-EMMC-BIT-PATTERN-SIM-TOOL AM62P EVM eMMC HS400 SI Simulation bit pattern text file

This text file patterns are designed to exercise the system to real, but worst-case conditions in SI Simulation
Productos y hardware compatibles

Productos y hardware compatibles

Encapsulado Pines Símbolos CAD, huellas y modelos 3D
FCBGA (AMH) 466 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL)/reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Los productos recomendados pueden tener parámetros, módulos de evaluación o diseños de referencia relacionados con este producto de TI.

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene alguna pregunta sobre calidad, encapsulados o pedido de productos de TI, consulte el servicio de asistencia de TI. ​​​​​​​​​​​​​​

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