LMK1C1102
- High-performance 1:2, 1:3 or 1:4 LVCMOS clock buffer
- Very low output skew < 50 ps
- Extremely low additive jitter < 50 fs maximum
- 7.5 fs typical at VDD = 3.3 V
- 10 fs typical at VDD = 2.5 V
- 19.2 fs typical at VDD = 1.8 V
- Very low propagation delay < 3 ns
- Synchronous output enable
- Supply voltage: 3.3 V, 2.5 V, or 1.8 V
- 3.3-V tolerant input at all supply voltages
- Fail-safe inputs
- fmax = 250 MHz for 3.3 V fmax = 200 MHz for 2.5 V and 1.8 V
- Operating temperature range: –40°C to 125°C
- Available in 8-pin TSSOP package
- Available in 8-pin WSON package
The LMK1C110x is a modular, high-performance, low-skew, general-purpose clock buffer family from Texas Instruments. The entire family is designed with a modular approach in mind. Three different fan-out variations, 1:2, 1:3, 1:4, are available.
All of the devices within this family are pin-compatible to each other and backwards compatible to the CDCLVC110x family for easy handling.
All family members share the same high performing characteristics such as low additive jitter, low skew, and wide operating temperature range.
The LMK1C110x supports a synchronous output enable control (1G) which switches the outputs into a low state when 1G is low. These devices have a fail-safe input that prevents oscillation at the outputs in the absence of an input signal and allows for input signals before VDD is supplied.
The LMK1C110x family operates in a 1.8-V, 2.5-V and 3.3-V environment and are characterized for operation from –40°C to 125°C.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | LMK1C110x 1.8-V, 2.5-V, and 3.3-V LVCMOS Clock Buffer Family datasheet (Rev. D) | PDF | HTML | 2022/2/18 | ||
| 應用說明 | Sine to Square Wave Conversion Using Clock Buffers | PDF | HTML | 2024/9/3 | |||
| 應用說明 | LMK1C110x Key Performance in System Level (Rev. A) | 2020/3/10 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
LMK1C1104DFNEVM — LMK1C1104 低抖動 1:4 LVCMOS 扇出緩衝 DFN 評估模組
LMK1C1104EVM — LMK1C1104 低抖動 1:4 LVCMOS 扇出緩衝器評估模組
LMK1C1108EVM — LMK1C1108 低抖動 1:8 LVCMOS 扇出緩衝器評估模組
CLOCK-TREE-ARCHITECT — 時鐘樹架構程式設計軟體
時鐘樹架構是一款時鐘樹合成工具,可根據您的系統需求產生時鐘樹解決方案,進而簡化您的設計流程。此工具可從廣泛的計時產品資料庫中汲取資料,產生系統級多晶片計時解決方案。
PLLATINUMSIM-SW — PLL 迴路濾波器、相位雜訊、鎖定時間與雜散模擬工具
PLLATINUMSIM-SW 為一模擬工具,可讓使用者建立 PLLatinum™ 積體電路的詳細設計和模擬,包括 LMX 系列的相位鎖定迴路 (PLL) 及合成器。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TSSOP (PW) | 8 | Ultra Librarian |
| WSON (DQF) | 8 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。