PLLATINUMSIM-SW — PLLatinum Sim Tool
PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.
The CDCLVC11xx is a modular, high-performance, low-skew, general-purpose clock buffer family from Texas Instruments.
The entire family is designed with a modular approach in mind. It is intended to round up TIs series of LVCMOS clock generators.
Seven different fan-out variations, 1:2 to 1:12, are available. All of the devices are pin-compatible to each other for easy handling.
All family members share the same high performing characteristics such as low additive jitter, low skew, and wide operating temperature range.
The CDCLVC11xx supports an asynchronous output enable control (1G) which switches the outputs into a low state when 1G is low.
The CDCLVC11xx family operates in a 2.5-V and
3.3-V environment and are characterized for operation from –40°C to 85°C.
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | CDCLVC11xx 3.3-V and 2.5-V LVCMOS High-Performance Clock Buffer Family datasheet (Rev. B) | PDF | HTML | 2017年 2月 24日 |
| Application note | Sine to Square Wave Conversion Using Clock Buffers | PDF | HTML | 2024年 9月 3日 | |
| Application note | How to Apply 1.8-V Signals to 3.3-V CDCLVC11xx Fanout Clock Buffer | 2010年 11月 30日 |
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PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.
此參考設計展示了 DP83848K 乙太網路 PHY 收發器裝置的進階性能,支援 10/100 Base-T 並符合 IEEE 802.3 標準。整個參考設計皆以單電源供電 (5V 含板載穩壓器或 3.3V) 運作。乙太網路 PHY (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TSSOP (PW) | 8 | Ultra Librarian |
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。
PLLatinum Sim User's Guide
PLLatinum Sim software manifest
PLLatinum Sim 1.6.9 includes the ability to manually specify points on a phase noise curve (for VCOs or other devices that do not fit the standard three-point model), and as a result the phase noise estimation for many devices which use a BAW VCO is greatly improved. Also includes a bugfix for cascading noise inputs.