ADC3683-SP
- Screening and radiation performance:
- QMLV screening and reliability
- Total ionizing dose (TID): 300krad (Si)
- Single event latch-up (SEL): 75MeV-cm2/mg
- Ambient temperature range: -55°C to 105°C
- Dual channel ADC
- 18-bit 65MSPS
- Noise Floor: -160dBFS/Hz
- Low power and optimized power scaling:
- 64mW/ch (10MSPS)
- 84mW/ch (65MSPS)
- Latency:
- 1 clock cycle in 1-wire mode
- 2 clock cycles in 2-wire mode
- 18-bit, no missing codes
- INL: ±7LSB, DNL: ±0.7LSB
- Internal or external reference
- Input bandwidth: 200MHz (-3dB)
- Optional digital down converter (DDC):
- Real or complex decimation
- Decimation by 2, 4, 8, 16, and 32
- 32-bit NCO
- Serial LVDS (SLVDS) interface (2-, 1-, and 1/2-wire)
- Spectral performance (FIN = 5MHz):
- SNR: 83.6dBFS
- SFDR: 87.1dBc
- Non HD23: 102dBC
The ADC3683-SP is a low latency, low noise, and ultra low power 18-bit 65MSPS high-speed dual channel ADC. Designed for best noise performance, the ADC delivers a noise spectral density of −160dBFS/Hz combined with excellent linearity and dynamic range. The ADC3683-SP offers DC precision together with IF sampling support to enable the design of a wide range of applications. The low latency architecture (as low as 1 clock cycle latency) and high sample rate also enable high speed control loops. The ADC consumes only 84mW/ch (1/2-swing enabled) at 65Msps and the power consumption scales well with sampling rate.
The device uses a serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device also integrates a digital down converter (DDC) to help reduce the data rate and lower system power consumption. The ADC3683-SP is pin-to-pin compatible with the 14-bit, 125MSPS, ADC3664-SP. The device comes in a 64-pin CFP package (10.9mm x 10.9mm), and supports a temperature range from −55°C to +125°C.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | ADC3683-SP Radiation-Hardness-Assured 18-Bit, Dual Channel, 1 to 65MSPS, Low Latency, Low Noise, Ultra Low Power, Analog-to-Digital Converter (ADC) datasheet (Rev. A) | PDF | HTML | 2024/12/13 |
* | Radiation & reliability report | ADC3683-SP Total Ionizing Dose (TID) Radiation Report | 2025/02/06 | |
* | Radiation & reliability report | ADC3683-SP Single Event Effects Report (Rev. A) | PDF | HTML | 2024/11/22 |
EVM User's guide | ADC36xxEVMCVAL Evaluation Module User's Guide | PDF | HTML | 2023/12/04 |
설계 및 개발
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ADC3683EVMCVAL — ADC3683-SP evaluation module
<p>The ADC3683EVMCVAL is used to evaluate the ADC3683-SP analog-to-digital converter (ADC). ADC3683-SP uses a serial low-voltage differential signaling (LVDS) interface to output the digital data. The serialized LVDS interface supports output rates up to 1Gbps. ADC3683-SP can be operated in (...)
PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®
TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
CFP (HBP) | 64 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
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