제품 상세 정보

Resolution (Bits) 24 Sample rate (max) (ksps) 1 Number of input channels 1 Interface type SPI Architecture Delta-Sigma Input type Differential Rating Catalog Reference mode External Input voltage range (max) (V) 1.15, 3.75 Input voltage range (min) (V) -1.6, 1 Features PGA Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 4.5 Analog supply voltage (min) (V) -2.5, 0 Analog supply voltage (max) (V) 2.5, 5 SNR (dB) 119 Digital supply (min) (V) 2.25 Digital supply (max) (V) 3.6
Resolution (Bits) 24 Sample rate (max) (ksps) 1 Number of input channels 1 Interface type SPI Architecture Delta-Sigma Input type Differential Rating Catalog Reference mode External Input voltage range (max) (V) 1.15, 3.75 Input voltage range (min) (V) -1.6, 1 Features PGA Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 4.5 Analog supply voltage (min) (V) -2.5, 0 Analog supply voltage (max) (V) 2.5, 5 SNR (dB) 119 Digital supply (min) (V) 2.25 Digital supply (max) (V) 3.6
VQFN (RHF) 24 20 mm² 5 x 4
  • Selectable Operating Modes
  • High-Resolution Mode:
    • SNR: 113 dB (1000 SPS, Gain = 1)
    • Power: 4.5 mW
  • Low-Power Mode:
    • SNR: 110 dB (1000 SPS, Gain = 1)
    • Power: 2.4 mW
  • THD: –115 dB
  • CMRR: 115 dB
  • High-Impedance CMOS PGA
    • Gains 1, 2, 4, 8, and 16
  • Data Rates: 62.5 SPS to 1000 SPS
  • Flexible Digital Filter:
    • Sinc + FIR + IIR (Selectable)
    • Linear and Minimum Phase Response
    • Programmable High-Pass Filter
  • Offset and Gain Calibration
  • Synchronization Control
  • SPI-Compatible Interface
  • Analog Power Supply: 5 V or ±2.5 V
  • Digital Power Supply: 2.5 V to 3.3 V
  • Selectable Operating Modes
  • High-Resolution Mode:
    • SNR: 113 dB (1000 SPS, Gain = 1)
    • Power: 4.5 mW
  • Low-Power Mode:
    • SNR: 110 dB (1000 SPS, Gain = 1)
    • Power: 2.4 mW
  • THD: –115 dB
  • CMRR: 115 dB
  • High-Impedance CMOS PGA
    • Gains 1, 2, 4, 8, and 16
  • Data Rates: 62.5 SPS to 1000 SPS
  • Flexible Digital Filter:
    • Sinc + FIR + IIR (Selectable)
    • Linear and Minimum Phase Response
    • Programmable High-Pass Filter
  • Offset and Gain Calibration
  • Synchronization Control
  • SPI-Compatible Interface
  • Analog Power Supply: 5 V or ±2.5 V
  • Digital Power Supply: 2.5 V to 3.3 V

The ADS1287 device is a low-power, analog-to-digital converter (ADC), with an integrated programmable gain amplifier (PGA) and finite-impulse-response (FIR) digital filter. The ADC is suitable for the demanding needs of seismic equipment requiring precision digitizing with low power consumption.

The ADC features a programmable-gain, high-impedance complementary metal oxide semiconductor (CMOS) amplifier, suitable for direct connection of geophone and hydrophone sensors to the ADC over a wide range of input signals (±2.5 V to ±0.156 V).

The ADC incorporates a fourth-order, inherently stable, delta-sigma (ΔΣ) modulator. The modulator digital output is filtered and decimated by the internal FIR digital filter to yield the ADC conversion result.

The FIR digital filter provides data rates up to 1000 samples per second (SPS). The high-pass filter (HPF) removes DC and low frequency components from the conversion result. On-chip gain and offset scaling registers support system calibration.

Together, the amplifier, modulator, and digital filter dissipate 4.5 mW in high-resolution mode (2.4 mW in low-power mode). The ADC is packaged in a compact 5-mm × 4-mm VQFN package. The ADC is fully specified over the –40°C to +85°C temperature range.

The ADS1287 device is a low-power, analog-to-digital converter (ADC), with an integrated programmable gain amplifier (PGA) and finite-impulse-response (FIR) digital filter. The ADC is suitable for the demanding needs of seismic equipment requiring precision digitizing with low power consumption.

The ADC features a programmable-gain, high-impedance complementary metal oxide semiconductor (CMOS) amplifier, suitable for direct connection of geophone and hydrophone sensors to the ADC over a wide range of input signals (±2.5 V to ±0.156 V).

The ADC incorporates a fourth-order, inherently stable, delta-sigma (ΔΣ) modulator. The modulator digital output is filtered and decimated by the internal FIR digital filter to yield the ADC conversion result.

The FIR digital filter provides data rates up to 1000 samples per second (SPS). The high-pass filter (HPF) removes DC and low frequency components from the conversion result. On-chip gain and offset scaling registers support system calibration.

Together, the amplifier, modulator, and digital filter dissipate 4.5 mW in high-resolution mode (2.4 mW in low-power mode). The ADC is packaged in a compact 5-mm × 4-mm VQFN package. The ADC is fully specified over the –40°C to +85°C temperature range.

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관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 유사한 기능
ADS1285 활성 지진 및 지구 공간을 탐사를 위한 32비트 고해상도 2채널 델타 시그마 ADC Higher dynamic range (134 dB), two channel

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하세요.
5개 모두 보기
상위 문서 유형 직함 형식 옵션 날짜
* Data sheet ADS1287 Low-Power, 1000-SPS, Wide-Bandwidth, Analog-to-Digital Converter With Programmable Gain Amplifier datasheet (Rev. B) PDF | HTML 2019/08/27
Application note Calculating Conversion Latency and System Cycle Time for Delta-Sigma ADCs (Rev. A) PDF | HTML 2024/03/18
Application note QFN and SON PCB Attachment (Rev. C) PDF | HTML 2023/12/06
Application note Digital Filter Types in Delta-Sigma ADCs (Rev. A) PDF | HTML 2023/03/29
E-book Fundamentals of Precision ADC Noise Analysis (Rev. A) 2020/06/19

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

시뮬레이션 모델

ADS1287 IBIS Model

SBAM326.ZIP (62 KB) - IBIS Model
계산 툴

ANALOG-ENGINEER-CALC PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

설계 툴

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

시뮬레이션 툴

PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 착수하기 (...)
시뮬레이션 툴

TINA-TI — SPICE 기반 아날로그 시뮬레이션 프로그램

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
사용 설명서: PDF
패키지 CAD 기호, 풋프린트 및 3D 모델
VQFN (RHF) 24 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

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