Four-transmit four-receive multiband RF-sampling transceiver with 14-bit 9-GSPS DAC and 3-GSPS ADC


Product details


Applications Wireless infrastructure # of TX/RX 4T4R # of DUCs/TX 2 # of DDCs/RX 2 Data rate (MSPS) 1500 Operating temperature range (C) -40 to 85 open-in-new Find other RF-sampling transceivers

Package | Pins | Size

FCBGA (ABJ) 400 289 mm² 17 x 17 open-in-new Find other RF-sampling transceivers


  • 14-Bit resolution
  • Sample rate:
    • DAC: 9GSPS
    • ADC: 3GSPS
  • RF Frequency range: up to 5.2 GHz
  • Maximum RF signal bandwidth
    • Quad-channel mode (4T4R): 800 MHz (single-band); 300 MHz (dual-band)
    • Dual-channel mode (2T2R): 1200 MHz (TX)/1000 MHz (RX) (single-band); 800MHz(dual-band)
  • On-chip dual selectable DSAs per RX channel
  • Integrated TX DSA functionality
  • Digital:
    • Dual band digital up-converters (DUCs)
    • Dual Band digital down-converters (DDCs)
    • 32-Bit NCOs for DUCs/DDCs
    • Interpolation ratio: 6x, 8x, 9x, 12x, 16x, 18x, 24x, 36x
    • Decimation ratio: /2, /3, /4, /6, /8, /9, /12, /16, /18, /24, /32
    • RX/FB Dynamic switching for TDD
  • Interface:
    • 8 SerDes Transceivers up to 15Gbps
    • 16-Bit and 12-bit JESD204B transport layer formatting with 8b/10b encoding
    • Subclass 1 multi-device synchronization
  • Clock:
    • Internal PLL/VCO to generate DAC and ADC clocks
  • Package: 17mm x 17mm FC BGA, 0.8mm pitch
  • Power supplies: 1.85 V, 1.15 V, 1.0 V, –1.8 V
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The AFE76xx is a family of high performance, quad/dual channel, 14-bit, integrated RF sampling analog front ends (AFEs) with 9 GSPS DACs and 3 GSPS ADCs, capable of synthesizing and digitizing wideband signals. High dynamic range allows the AFE76xx to generate and digitize 3G/4G signals for wireless base stations. In TDD mode, the receiver channel can be configured to dynamically switching between traffic receiver (TDD RX) status and wideband feedback receiver (TDD FB) status to assist DPD (Digital Pre-Distortion) of the Power Amplifier (PA) on the transmitter path.

The AFE76xx family has integrated DSA on the receiver channels and also supports DSA equivalent functionality on the transmitter channels. Each receiver channel has one analog RF peak power detector and various digital power detectors to assist AGC control for receiver channels, and two RF overload detectors for device reliability protection. The AFE76xx family has 8 of JESD204B compatible SerDes transceivers running up to 15 Gbps. The devices have up to two DUCs per TX channel and two DDCs per RX channel, with multiple interpolation/decimation rates and digital quadrature modulators/demodulators with independent, frequency flexible NCOs. The devices support more than 1000 MHz (800 MHz as 4T4R) RF signal bandwidth in single-band mode, and up to 800 MHz (300 MHz as 4T4R) RF signal bandwidth per band in dual-band mode. A low jitter PLL/VCO simplifies the sampling clock generation by allowing use of a lower frequency reference clock.

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More information

See the full data sheet and other design resources for the commercial wireless-specific AFE7686. Request now

For all other applications, see our general-purpose RF-sampling AFEs.

Technical documentation

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Type Title Date
* Data sheet AFE76xx Quad/dual-channel, RF sampling analog front-end with 14-bit 9GSPS DACs and 14-bit 3GSPS ADCs datasheet (Rev. E) Mar. 01, 2019
Application note MIMO Transceiver with AFE76xx for LTE and 5G Wireless Radio (Rev. A) Sep. 02, 2021
Technical article So, what's a VNA anyway? Aug. 23, 2019
Technical article So, what's the deal with frequency response? Aug. 23, 2019
Application note Temp Profile to Maintain Optimum FIT Performance Jul. 23, 2019
Technical article So, what are S-parameters anyway? May 23, 2019
Technical article How to achieve fast frequency hopping Mar. 03, 2019
Application note RF Sampling for Multi-band Radios Nov. 26, 2018
Application note Small Cell and Repeater System Using Integrated RF Sampling Device Nov. 12, 2018
Application note AFE76xx as a Single-Chip Wideband Repeater Using Loopback Mode Nov. 01, 2018
Application note Dither Improves ACPR in RF Sampling DAC Oct. 24, 2018
Application note Modular Communications Transceiver for 4G/5G Distributed Antenna Aug. 18, 2018
Application note AFE768x Power Dissipation Comparison across Modes Jul. 25, 2018
User guide AFE76xx Evaluation Module User's Guide Mar. 16, 2018
Application note An Efficient LDO-less Power Supply Solution for AFE76xx Nov. 13, 2017

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Software development

JESD204 Rapid Design IP for FPGAs connected to TI high-speed data converters
TI-JESD204-IP The JESD204 rapid design IP has been designed to enable FPGA engineers to achieve an accelerated path to a working JESD204 system. The IP has been architected in a way that downstream digital processing and other application logic are isolated from most of the performance- and timing-critical (...)
  • Compatible with JEDEC JESD204a/b/c protocols
  • Supports subclass 1 deterministic latency and multidevice synchronization
  • Supported lane rates
    • Up to 16.375 Gbps in 8b/10b mode
    • Up to 20 Gbps in 64b/66b mode
  • Supports all protocol related error detection and reporting features
  • Integrated transport layer (...)
SLWC107W.ZIP (591961 KB)

Design tools & simulation

SLWC116.ZIP (17197 KB)

CAD/CAE symbols

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FCBGA (ABJ) 400 View options

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