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High-speed DACs (>10 MSPS)

DAC38RF83

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Dual-Channel, 14-Bit, 9-GSPS, 6x-24x Interpolating, 6 & 9 GHz PLL Digital-to-Analog Converter (DAC)

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Data sheet

DAC38RF83

ACTIVE
Data sheet Order now

Product details

Resolution (Bits) 14 Number of DAC channels 2 Interface type JESD204B Sample/update rate (Msps) 9000 Features Ultra High Speed Rating Catalog Interpolation 10x, 12x, 16x, 18x, 20x, 24x, 6x, 8x Power consumption (typ) (mW) 3800 SFDR (dB) 97 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Ext, Int
Resolution (Bits) 14 Number of DAC channels 2 Interface type JESD204B Sample/update rate (Msps) 9000 Features Ultra High Speed Rating Catalog Interpolation 10x, 12x, 16x, 18x, 20x, 24x, 6x, 8x Power consumption (typ) (mW) 3800 SFDR (dB) 97 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Ext, Int
FCCSP (AAV) 144 100 mm² (10 mm × 10 mm)
  • 14-bit resolution
  • Maximum DAC sample rate: 9 GSPS
  • Key Specifications:
    • RF full-scale output power at 2.1 GHz:
      • DAC38RF80/90/84: 0 dBm
      • DAC38RF83/93/85: 3 dBm (with 2:1 balun)
    • Spectral performance(on-chip PLL, DIFF):
      • fDAC = 5898.24 MSPS, fOUT = 2.14 GHz
        • WCDMA ACLR: 75 dBc
        • WCDMA alt-ACLR: 77 dBc
      • fDAC = 8847.36 MSPS, fOUT = 3.7 GHz
        • 20 MHz LTE ACLR: 63 dBc
      • fDAC = 9 GSPS, fOUT = 1.8 GHz
        • IMD3 = 70 dBc (–6 dBFS, 10-MHz tone spacing)
        • NSD = –157 dBc/Hz
  • Dual-band digital up-converter per DAC
    • 6, 8, 10, 12, 16, 18, 20 or 24x interpolation
    • 4 Independent NCOs with 48-bit resolution
  • JESD204B Interface, subclass 1
    • Support for multichip synchronization
    • Maximum lane rate: 12.5 Gbps
  • Single-ended output with integrated balun (DAC38RF80/90/84) covering 700 MHz to 3800 MHz
  • Internal PLL and VCO with bypass
    • fC(VCO) = 5.9 or 8.9 GHz
  • Power dissipation: 1.4 to 2.2 W/ch
  • Power supplies: –1.8 V, 1 V, 1.8 V
  • Package: 10 x 10 mm BGA, 0.8 mm pitch, 144-balls
  • 14-bit resolution
  • Maximum DAC sample rate: 9 GSPS
  • Key Specifications:
    • RF full-scale output power at 2.1 GHz:
      • DAC38RF80/90/84: 0 dBm
      • DAC38RF83/93/85: 3 dBm (with 2:1 balun)
    • Spectral performance(on-chip PLL, DIFF):
      • fDAC = 5898.24 MSPS, fOUT = 2.14 GHz
        • WCDMA ACLR: 75 dBc
        • WCDMA alt-ACLR: 77 dBc
      • fDAC = 8847.36 MSPS, fOUT = 3.7 GHz
        • 20 MHz LTE ACLR: 63 dBc
      • fDAC = 9 GSPS, fOUT = 1.8 GHz
        • IMD3 = 70 dBc (–6 dBFS, 10-MHz tone spacing)
        • NSD = –157 dBc/Hz
  • Dual-band digital up-converter per DAC
    • 6, 8, 10, 12, 16, 18, 20 or 24x interpolation
    • 4 Independent NCOs with 48-bit resolution
  • JESD204B Interface, subclass 1
    • Support for multichip synchronization
    • Maximum lane rate: 12.5 Gbps
  • Single-ended output with integrated balun (DAC38RF80/90/84) covering 700 MHz to 3800 MHz
  • Internal PLL and VCO with bypass
    • fC(VCO) = 5.9 or 8.9 GHz
  • Power dissipation: 1.4 to 2.2 W/ch
  • Power supplies: –1.8 V, 1 V, 1.8 V
  • Package: 10 x 10 mm BGA, 0.8 mm pitch, 144-balls

The DAC38RFxx is a family of high-performance, dual/single-channel, 14-bit, 9-GSPS, RF-sampling digital-to-analog converters (DACs) that are capable of synthesizing wideband signals from 0 to 4.5 GHz. A high dynamic range allows the DAC38RFxx family to generate signals for a wide range of applications including 3G/4G signals for wireless base-stations and radar.

The devices feature a low-power JESD204B Interface with up to 8 lanes with a maximum bit rate of 12.5 Gbps allowing an input data rate of 1.25 GSPS complex per channel. The DAC38RFxx provides two digital up-converters per channel, with multiple options for interpolation rates. A digital quadrature modulator with independent, frequency flexible NCOs are available to support multi-band operation. An optional low-jitter PLL/VCO simplifies the DAC sampling clock generation by allowing use of a lower frequency reference clock.

The DAC38RFxx is a family of high-performance, dual/single-channel, 14-bit, 9-GSPS, RF-sampling digital-to-analog converters (DACs) that are capable of synthesizing wideband signals from 0 to 4.5 GHz. A high dynamic range allows the DAC38RFxx family to generate signals for a wide range of applications including 3G/4G signals for wireless base-stations and radar.

The devices feature a low-power JESD204B Interface with up to 8 lanes with a maximum bit rate of 12.5 Gbps allowing an input data rate of 1.25 GSPS complex per channel. The DAC38RFxx provides two digital up-converters per channel, with multiple options for interpolation rates. A digital quadrature modulator with independent, frequency flexible NCOs are available to support multi-band operation. An optional low-jitter PLL/VCO simplifies the DAC sampling clock generation by allowing use of a lower frequency reference clock.
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Technical documentation

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* Data sheet DAC38RFxx Dual- or Single-Channel, Single-Ended or Differential Output, 14-Bit, 9-GSPS, RF-Sampling DAC With JESD204B Interface and On-Chip PLL datasheet (Rev. D) PDF | HTML Dec 28, 2023
Application note Impact of Power-Supply Noise on Phase Noise Performance of RF DACs Jun 13, 2018
Application note Eye Scan Testing with the DAC38RFxx Aug 10, 2017
Application note Quick-Start Methods in Simulating the DAC38RF8x Input/Output Buffer Information Aug 2, 2017
Application note DAC38RF8x Test Modes Jul 25, 2017
Technical article Digital signal processing in RF sampling DACs – part 2 PDF | HTML Apr 4, 2017
Technical article Digital signal processing in RF sampling DACs - part 1 PDF | HTML Feb 13, 2017
Application note Digital RF Power Control for Power Amplifer Protection in Wireless Base Feb 6, 2017
Application note RF Sampling DAC with 800 MHz of IBW LTE Oct 28, 2016
Design guide Efficient Power Supply Scheme for RF-Sampling DAC Reference Design Aug 22, 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

DAC38RF82EVM — DAC38RF82 Dual-Channel, 14-Bit, 9-GSPS, 1x-24x Interpolating, 6 & 9 GHz PLL DAC Evaluation Module

The DAC38RF82EVM is the circuit board for evaluating DAC38RF82/83/85/93 digital to analog converters (DACs). The EVM can be used to evaluate the performance of the DAC up to 9GSPS sampling rate and it is designed to work with the TSW14J56 EVM. The available FMC connector also makes it possible to (...)
User guide: PDF
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Firmware

SLAC771 — Arria10 + DAC38RF82 Design Firmware

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Firmware

SLAC779 — DAC38RF8x KCU105 Firmware

Supported products & hardware
Firmware

TI204C-IP — Request for JESD204 rapid design IP

The JESD204 rapid design IP has been designed to enable FPGA engineers to achieve an accelerated path to a working JESD204 system. The IP has been architected in a way that downstream digital processing and other application logic are isolated from most of the performance- and timing-critical (...)

Supported products & hardware
GUI for evaluation module (EVM)

DATACONVERTERPRO-SW — High Speed Data Converter Pro GUI Installer, v5.31

This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)

Supported products & hardware
GUI for evaluation module (EVM)

SLAC722 — DAC38RF8x EVM GUI

Supported products & hardware
Simulation model

DAC38RF80 IBIS Model

SLAM304.ZIP (70 KB) - IBIS model
Supported products & hardware
Simulation model

DAC38RF8x IBIS-AMI Model (Rev. A)

SLAM343A.ZIP (24658 KB) - IBIS-AMI model
Supported products & hardware
Reference design

TIDA-01084 — Continuous Wave Phase-aligned Multitone Generator: DC-to-6-GHz RF-Sampling DAC Reference Design

The TIDA-01084 reference design demonstrates the use of RF sampling DAC to generate continuous phase-aligned multitone waveforms. With four 48-bit independent NCOs, the 14-bit, 9GSPS DAC38RF83 can generate four CW tones placed anywhere within the first Nyquist zone or up to 6 GHz in the second.

This (...)

Supported products & hardware
Reference design

TIDA-01215 — Power Supply Reference Design for Optimizing Spur and Phase Noise in RF-sampling DACs

This reference design provides an efficient power supply scheme to power-up the RF-sampling DAC38RF8x digital-to-analog data converter (DAC) without sacrificing performance and also reduces board area and BOM. The reference design uses both DC/DC switchers and an LDO to power-up the DAC38RF8x (...)
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
FCCSP (AAV) 144 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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