The ADC31JB68 is a low-power, wide-bandwidth, 16-bit, 500-MSPS analog-to-digital
converter (ADC). The buffered analog input provides uniform input impedance across a wide frequency
range while minimizing sample-and-hold glitch energy. This device is designed to sample input
signals of up to 1.3 GHz.
The ADC31JB68 provides excellent spurious-free dynamic range (SFDR) over a large input
frequency range with very-low power consumption. On-chip dither provides an very-clean noise floor.
Embedded foreground and background calibration provides consistent performance over the temperature
range, and minimizes part-to-part variation.
This device supports the JESD204B serial interface with data rates up to 5 Gbps on each
of two lanes, enabling high system integration density.
The ADC31JB68 comes in a 6-mm × 6-mm, 40-pin QFN package.