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ADC09QJ1300-Q1

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Automotive quad-channel 9-bit 1.3-GSPS analog-to-digital converter (ADC) with JESD204C interface

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Automotive quad-channel 9-bit 1.3-GSPS analog-to-digital converter (ADC) with JESD204C interface

ADC09QJ1300-Q1

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Product details

Parameters

Analog input BW (MHz) 6000 Features Ultra High Speed Rating Automotive Input range (Vp-p) 0.8 Power consumption (Typ) (mW) 2000 Architecture Folding Interpolating ENOB (Bits) 8.6 Operating temperature range (C) -40 to 125 Input buffer Yes open-in-new Find other High-speed ADCs (>10MSPS)

Package | Pins | Size

FCBGA (AAV) 144 open-in-new Find other High-speed ADCs (>10MSPS)

Features

  • Qualified for automotive applications
  • ADC Core:
    • Resolution: 9 Bit
    • Maximum sampling rate: 1.3 GSPS
    • Non-interleaved architecture
    • Internal dither reduces high-order harmonics
  • Performance specifications (–1 dBFS):
    • SNR (100 MHz): 53.5 dBFS
    • ENOB (100 MHz): 8.5 Bits
    • SFDR (100 MHz): 64 dBc
    • Noise floor (–20 dBFS): –143 dBFS
  • Full-scale input voltage: 800 mVPP-DIFF
  • Full-power input bandwidth: 6 GHz
  • JESD204C Serial data interface:
    • Support for 2 to 8 total SerDes lanes
    • Maximum linerate: 17.16 Gbps
    • 64B/66B and 8B/10B encoding modes
    • Subclass-1 support for deterministic latency
    • Compatible with JESD204B receivers
  • Optional internal sampling clock generation
    • Internal PLL and VCO
    • VCO frequency: 7.2–8.2 GHz
  • SYSREF Windowing eases synchronization
  • Four clock outputs simplify system clocking
    • Reference clocks for FPGA or adjacent ADC
    • Reference clock for SerDes transceivers
  • Timestamp input and output for pulsed systems
  • Power consumption (1 GSPS): 435 mW / channel
  • Power supplies: 1.1 V, 1.9 V
  • Create a custom design for the ADC09QJ1300-Q1 with the WEBENCH® Power Designer

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open-in-new Find other High-speed ADCs (>10MSPS)

Description

ADC09QJ1300-Q1 is a quad channel, 9-bit, 1.3 GSPS analog-to-digital converter (ADC). Low power consumption, high sampling rate and 9-bit resolution makes the ADC09QJ1300-Q1 ideally suited for light detection and ranging (LiDAR) systems and handheld test equipment. ADC09QJ1300-Q1 qualified for automotive applications.

Full-power input bandwidth (-3 dB) of 6 GHz provides flat frequency response for frequency modulated continuous wave (FMCW) LiDAR systems and provides a narrow impulse response for pulse-based systems. The full-power input bandwidth also enables direct RF sampling of up to 4 GHz.

A number of clocking features are included to relax system hardware requirements, such as an internal phase-locked loop (PLL) with integrated voltage-controlled oscillator (VCO) to generate the sampling clock. Four clock outputs are provided to clock the logic and SerDes of the FPGA or ASIC. A timestamp input and output is provided for pulsed systems.

JESD204C serialized interface decreases system size by reducing the amount of printed circuit board (PCB) routing. Interface modes support from 2 to 8 lanes and SerDes linerates up to 17.16 Gbps to allow the optimal configuration for each application.

open-in-new Find other High-speed ADCs (>10MSPS)
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Sample availability

Preproduction samples are available (PADC09QJ1300AAV). Order now

Technical documentation

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Type Title Date
* Datasheet ADC09QJ1300-Q1 Quad Channel, 1.3 -GSPS, 9-bit Analog-to-Digital Converter (ADC) with JESD204C Interface datasheet May 20, 2019
User guides ADCxxQJ1x00 Evaluation Module User's Guide Apr. 21, 2019
Technical articles How to achieve fast frequency hopping Mar. 03, 2019
Technical articles RF sampling: Learning more about latency Feb. 09, 2017
Technical articles Why phase noise matters in RF sampling converters Nov. 28, 2016
Technical articles How to minimize filter loss when you drive an ADC Oct. 20, 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
$1,999.00
Description

The ADC09QJ1300 evaluation module (EVM) allows for the evaluation of the ADC09QJ1300-Q1 device. ADC09QJ1300-Q1 is a low-power, 9-bit, quad-channel, 1.3-GSPS analog-to-digital converter (ADC) with a buffered analog input and integrated digital down converter with on-chip PLL, which features a (...)

Features
  • Flexible transformer-coupled analog input allows for a variety of sources and frequencies
  • Easy-to-use software GUI to configure ADC09QJ1300-Q1 and LMK04828 devices for a variety of configurations through a USB interface
  • Quickly evaluate ADC performance through high-speed data converter pro software (...)

Software development

SUPPORT SOFTWARE Download
High-speed data converter pro software
DATACONVERTERPRO-SW This high-speed data converter pro GUI is a PC (Windows® XP/7 compatible) program designed to aid in evaluation of most TI high-speed data converter and analog front-end (AFE) platforms. Designed to support the entire TSW14xxx series of data-capture and pattern-generation cards (...)
Features
  • Compatible with TSW1400, TSW1405, TSW1406 and TSW14J10, TSW14J50, TSW14J56, and TSW14J57 pattern-generation and data-capture platforms
  • Works with all TI high-speed DAC, ADC, and AFE products
  • Provides time-domain and frequency-domain analysis
  • Supports single-tone, multi-tone, and modulated (...)

CAD/CAE symbols

Package Pins Download
FCBGA (AAV) 144 View options

Ordering & quality

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